TSC87251G1A
8. EPROM Programming
8.1. Internal ROM Features
The internal ROM of the TSC87251G1A products contains five different areas:
D Code Memory
D Configuration Bytes
D Lock Bits
D Encryption Array
D Signature Bytes
8.1.1. EPROM/OTPROM Devices
All the Internal ROM but the Signature Bytes of the TSC87251G1A products is made of EPROM cells. The Signature
Bytes of the TSC87251GxD products are made of Mask ROM.
The TSC87251G1A products are programmed and verified in the same manner as TEMIC’s TSC87251G1 and
TSC87251A1A, using a SINGLE–PULSE algorithm, which programs at VPP= 12.75V using only one 100 µs pulse
per byte. This results in a programming time of less than 5 seconds for the 16 Kbytes on–chip code memory.
The EPROM of TSC87251G1A products in Window CQPJ is erasable by Ultra–Violet radiation (UV). UV erasure set
all the EPROM memory cells to one and allows a reprogramming. The quartz window must be covered with an opaque
label when the device is in operation. This is not so much to protect the EPROM array from inadvertent erasure, as
to protect the RAM and other on–chip logic. Allowing light to impinge on the silicon die during device operation may
cause a logical malfunction.
Note:
Erasure of the EPROM begins to occur when the chip is exposed to light wavelength shorter than 4000Å. Since sunlight and fluorescent light have
wavelength in this range, exposure to these light sources over an extended time (1 week in sunlight or 3 years in room–level fluorescent lighting) could
cause inadvertent erasure.
The TSC87251G1A products in plastic packages are One Time Programmable (OTP). Then an EPROM cell cannot
be reset by UV once programmed to zero.
8.1.2. Security Features
In some microcontrollers applications, it is desirable that the user program code be secured from unauthorized access.
The TSC87251G1A offers two kinds of protection for program code stored in the on–chip array:
D Program code in the on–chip Code Memory is encrypted when read out for verification if the Encryption Array is
programmed.
D A three–level lock bit system restricts external access to the on–chip code memory.
8.1.3. Lock Bit System
The TSC87251G1A products implement 3 levels of security for User’s program as described in Table 35.
The first level locks the programming of the User’s internal Code Memory, the Configuration Bytes and the Encryption
Array.
The second level locks the verifying of the User’s internal Code Memory. It is always possible to verify the Configura-
tion Bytes and the Lock Bits. It is never possible to verify the Encryption Array.
The third level locks the external execution.
27
Rev. A – September 21, 1998
TEMIC [ TEMIC SEMICONDUCTORS ]
