TSC87251G1A
Table 29. Summary of Bit Instructions
Clear Bit
CLR <dest>
dest opnd ← 0
Set Bit
Complement Bit
AND Carry with Bit
SETB <dest>
CPL <dest>
ANL CY, <src>
dest opnd ← 1
dest opnd ← bit
(CY) ← (CY) src opnd
AND Carry with Complement of Bit ANL CY, /<src>
(CY) ← (CY)
src opnd
OR Carry with Bit
OR Carry with Complement of Bit
Move Bit to Carry
ORL CY, <src>
ORL CY, /<src>
MOV CY, <src>
MOV <dest>, CY
(CY) ← (CY) src opnd
(CY) ← (CY)
src opnd
(CY) ← src opnd
dest opnd ← (CY)
Move Bit from Carry
Binary Mode
Source Mode
Mnemonic
<dest>, <src>(1)
Comments
Bytes
States
Bytes
States
CY
Clear carry
1
2
4
1
2
4
1
2
4
2
4
2
4
2
4
2
4
2
4
2
4
1
1
2
3
1
2
3
1
2
3
2
3
2
3
2
3
2
3
2
3
2
3
1
(3)
(3)
CLR
bit51
Clear direct bit
2
2
(3)
(3)
bit
Clear direct bit
4
3
CY
Set carry
1
1
(3)
(3)
SETB
CPL
bit51
Set direct bit
2
2
(3)
(3)
bit
Set direct bit
4
3
CY
Complement carry
Complement direct bit
Complement direct bit
And direct bit to carry
And direct bit to carry
1
1
(3)
(3)
bit51
2
2
(3)
(3)
bit
4
3
(2)
(2)
CY, bit51
CY, bit
CY, /bit51
CY, /bit
CY, bit51
CY, bit
CY, /bit51
CY, /bit
CY, bit51
CY, bit
bit51, CY
bit, CY
1
1
(2)
(2)
3
2
ANL
ORL
(2)
(2)
And complemented direct bit to carry
And complemented direct bit to carry
Or direct bit to carry
1
1
(2)
(2)
3
2
(2)
(2)
1
1
(2)
(2)
Or direct bit to carry
3
2
(2)
(2)
Or complemented direct bit to carry
Or complemented direct bit to carry
Move direct bit to carry
1
1
(2)
(2)
3
2
(2)
(2)
1
1
(2)
(2)
Move direct bit to carry
3
2
MOV
(3)
(3)
Move carry to direct bit
2
2
(3)
(3)
Move carry to direct bit
4
3
Notes:
1. A shaded cell denotes an instruction in the C51 Architecture.
2. If this instruction addresses an I/O Port (Px, x= 0–3), add 1 to the number of states. Add 2 if it addresses a Peripheral SFR.
3. If this instruction addresses an I/O Port (Px, x= 0–3), add 2 to the number of states. Add 3 if it addresses a Peripheral SFR.
23
Rev. A – September 21, 1998
TEMIC [ TEMIC SEMICONDUCTORS ]
