TSC87251G1A
Table 17. Notation for Bit Addressing
Description
Direct Address
C251
C51
bit51
bit
A directly addressed bit (bit number= 00h-FFh) in memory or an SFR. Bits 00h-7Fh are the
128 bits in byte locations 20h-2Fh in the on-chip RAM. Bits 80h-FFh are the 128 bits in the
16 SFRs with addresses that end in 0h or 8h, S:80h, S:88h, S:90h,..., S:F0h, S:F8h.
n
A directly addressed bit in memory locations 00:0020h-00:007Fh or in any defined SFR.
n
Table 18. Notation for Destination in Control Instructions
Description
Direct Address
C251
C51
rel
A signed (two’s complement) 8-bit relative address. The destination is –128 to +127 bytes
relative to the next instruction’s first byte.
n
n
addr11
addr16
addr24
An 11-bit target address. The target is in the same 2-Kbyte block of memory as the next
instruction’s first byte.
n
n
A 16-bit target address. The target can be anywhere within the same 64-Kbyte region as the
next instruction’s first byte.
A 24-bit target address. The target can be anywhere within the 16–Mbyte address space.
n
Table 19. Notation for Register Operands
Register
Description
C251
C51
n
n
@Ri
A memory location (00h-FFh) addressed indirectly via byte registers R0 or R1
Rn
n
Byte register R0-R7 of the currently selected register bank
Byte register index: n= 0-7
Rm
Rmd
Byte register R0-R15 of the currently selected register file
Destination register
n
n
Rms
m, md, ms
Source register
Byte register index: m, md, ms= 0-15
WRj
Word register WR0, WR2, ..., WR30 of the currently selected register file
Destination register
Source register
A memory location (00:0000h-00:FFFFh) addressed indirectly through word register
WR0-WR30, is the target address for jump instructions.
WRjd
WRjs
@WRj
@WRj +dis16
j, jd, js
A memory location (00:0000h-00:FFFFh) addressed indirectly through word register
(WR0-WR30) + 16–bit signed (two’s complement) displacement value
Word register index: j, jd, js= 0-30
DRk
Dword register DR0, DR4, ..., DR28, DR56, DR60 of the currently selected register file
DRkd
DRks
@DRk
Destination register
Source register
A memory location (00:0000h-FF:FFFFh) addressed indirectly through dword register
DR0-DR28, DR56 and DR60, is the target address for jump instruction
n
@DRk +dis16
k, kd, ks
A memory location (00:0000h-FF:FFFFh) addressed indirectly through dword register
(DR0-DR28, DR56, DR60) + 16–bit (two’s complement) signed displacement value
Dword register index: k, kd, ks= 0, 4, 8..., 28, 56, 60
16
Rev. A – September 21, 1998
TEMIC [ TEMIC SEMICONDUCTORS ]
