TSC87251G1A
Table 12. SFR Addresses and Reset Values
0/8
1/9
2/A
3/B
4/C
5/D
6/E
7/F
CH
0000 0000
CCAP0H
0000 0000
CCAP1H
0000 0000
CCAP2H
0000 0000
CCAP3H
0000 0000
CCAP4H
0000 0000
F8h
F0h
E8h
E0h
D8h
D0h
C8h
C0h
B8h
B0h
A8h
A0h
98h
90h
88h
80h
FFh
F7h
EFh
E7h
DFh
D7h
CFh
C7h
BFh
B7h
AFh
A7h
9Fh
97h
(1)
B
0000 0000
CL
0000 0000
CCAP0L
0000 0000
CCAP1L
0000 0000
CCAP2L
0000 0000
CCAP3L
0000 0000
CCAP4L
0000 0000
(1)
ACC
0000 0000
CCON
CMOD
00X0 0000 00XX X000
CCAPM0
X000 0000
CCAPM1
X000 0000
CCAPM2
X000 0000
CCAPM3
X000 0000
CCAPM4
X000 0000
(1)
(1)
PSW
PSW1
0000 0000
0000 0000
T2CON
T2MOD
0000 0000 XXXX XX00
RCAP2L
0000 0000
RCAP2H
0000 0000
TL2
0000 0000
TH2
0000 0000
(1)
IPL0
X000 0000
SADEN
0000 0000
SPH
0000 0000
P3
IE1
IPL1
IPH1
IPH0
X000 0000
1111 1111 XX0X XXX0 XX0X XXX0 XX0X XXX0
IE0
0000 0000
SADDR
0000 0000
P2
1111 1111
WDTRST
1111 1111
SCON
SBUF
BRL
0000 0000
BDRCON
XXX0 0000
P1LS
0000 0000
P1IE
0000 0000
P1F
0000 0000
0000 0000 XXXX XXXX
P1
1111 1111
SSBR
0000 0000
SSCON
0000 0000
SSCS
SSDAT
0000 0000
(2)
TCON
0000 0000
TMOD
0000 0000
TL0
0000 0000
TL1
0000 0000
TH0
0000 0000
TH1
0000 0000
CKRL
0000 1000
POWM
0XXX 0XXX
8Fh
87h
(1)
(1)
(1)
P0
1111 1111
SP
0000 0111
DPL
DPH
DPXL
PFILT
XXXX XXXX
PCON
0000 0000
0000 0000
0000 0000
0000 0001
0/8
1/9
2/A
3/B
4/C
5/D
6/E
7/F
reserved
Notes:
1. These registers are described in the TSC80251 Programmer’s Guide (C251 core registers).
2. In read and write modes, SSCS is splitted in two separate registers. SSCS reset value is 1111 1000 in read mode and 0000 0000 in write mode.
12
Rev. A – September 21, 1998
TEMIC [ TEMIC SEMICONDUCTORS ]
