UPSD3212C, UPSD3212CV
Table 16. List of all SFR
SFR
Bit Register Name
Reset
Reg Name
Comments
Value
Addr
7
6
5
4
3
2
1
0
80
81
82
83
87
P0
SP
FF
07
Port 0
Stack Ptr
DPL
DPH
PCON
00 Data Ptr Low
00 Data Ptr High
SMOD
TF1
SMOD1 LVREN ADSFINT RCLK1 TCLK1
PD
IDLE
IT0
00
00
Power Ctrl
Timer / Cntr
Control
88
89
TCON
TMOD
TR1
C/T
TF0
M1
TR0
M0
IE1
IT1
IE0
Timer / Cntr
Mode Control
Gate
Gate
C/T
M1
M0
00
8A
8B
8C
8D
90
TL0
TL1
TH0
TH1
P1
00 Timer 0 Low
00 Timer 1 Low
00 Timer 0 High
00 Timer 1 High
FF
00
Port 1
Port 1 Select
Register
91
93
94
P1SFS
P3SFS
P4SFS
P1S7
P3S7
P4S7
P1S6
P3S6
P4S6
P1S5
P4S5
P1S4
P4S4
Port 3 Select
Register
00
00
Port 4 Select
Register
P4S3
P4S2
P4S1
P4S0
8-bit
95
ASCL
00 Prescaler for
ADC clock
ADC Data
00
96
97
ADAT
ADAT7
ADAT6 ADAT5 ADAT4 ADAT3 ADAT2 ADAT1 ADAT0
Register
ADC Control
Register
ACON
ADEN
SM2
ADS1
TB8
ADS0
RB8
ADST
TI
ADSF
RI
00
Serial Control
98
99
9A
SCON
SBUF
SM0
SM0
SM1
SM1
REN
REN
00
Register
00 Serial Buffer
2nd UART
00
SCON2
SM2
TB8
RB8
TI
RI
Ctrl Register
2nd UART
00
9B
A0
SBUF2
P2
Serial Buffer
FF
00
Port 2
PWM Control
Polarity
A1 PWMCON PWML
PWMP PWME CFG4
CFG3
CFG2
CFG1
CFG0
PWM0
A2
PWM0
00 Output Duty
Cycle
33/152