UPSD3212C, UPSD3212CV
Table 90. DC Characteristics (3V Devices)
Test Condition
Symbol
Parameter
(in addition to those
in Table 87, page 122)
Min.
Typ.
Max.
Unit
Input High Voltage (Ports 1, 2,
3, 4[Bits 7,6,5,4,3,1,0], A, B, C,
D, XTAL1, RESET)
V
3.0V < V < 3.6V
0.7V
V
V
+ 0.5
V
V
V
IH
CC
CC
CC
Input High Voltage (Port 4[Bit
2])
V
3.0V < V < 3.6V
+ 0.5
2.0
IH1
CC
CC
Input High Voltage (Ports 1, 2,
3, 4[Bits 7,6,5,4,3,1,0], XTAL1,
RESET)
V
3.0V < V < 3.6V
V
V
– 0.5
0.3V
CC
IL
CC
SS
Input Low Voltage
(Ports A, B, C, D)
3.0V < V < 3.6V
–0.5
– 0.5
0.8
0.8
0.1
V
V
V
CC
V
IL1
V
OL
Input Low Voltage
(Port 4[Bit 2])
3.0V < V < 3.6V
CC
SS
I
= 20µA
OL
0.01
0.15
V
= 3.0V
CC
Output Low Voltage
(Ports A,B,C,D)
I
V
= 4mA
= 3.0V
OL
0.45
V
CC
I
= 1.6mA
= 100µA
= 3.2mA
= 200µA
= –20µA
0.45
0.3
V
V
V
V
OL
OL
OL
OL
Output Low Voltage
(Ports 1,2,3,4, WR, RD)
V
V
OL1
I
I
I
0.45
0.3
Output Low Voltage
(Port 0, ALE, PSEN)
OL2
I
OH
2.9
2.4
2.99
2.6
V
V
V
= 3.0V
CC
Output High Voltage
(Ports A,B,C,D)
V
OH
I
V
= –1mA
OH
= 3.0V
CC
I
= –20µA
= –10µA
= –800µA
= –80µA
= –1µA
2.0
2.7
2.0
2.7
V
V
V
V
V
V
OH
OH
Output High Voltage
(Ports 1,2,3,4, WR, RD)
V
OH1
I
I
OH
Output High Voltage (Port 0 in
ext. Bus Mode, ALE, PSEN)
V
V
OH2
OH3
I
OH
Output High Voltage V
I
V
– 0.8
STBYON
OH
STBY
V
Low Voltage Reset
0.1V hysteresis
= 3.2mA
2.3
2.5
2.7
2.0
LVR
XTAL Open Bias Voltage
(XTAL1, XTAL2)
V
I
OL
1.0
V
OP
V
(min) for Flash Erase and
CC
V
1.5
2.0
2
2.2
V
V
V
LKO
Program
V
STBY
V
– 0.2
CC
SRAM (PSD) Standby Voltage
SRAM (PSD) Data Retention
Voltage
V
Only on V
STBY
DF
IL
V
IN
= 0.45V
Logic '0' Input Current
(Ports 1,2,3,4)
I
–1
–50
µA
(0V for Port 4[pin 2])
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