UPSD3212C, UPSD3212CV
Table 89. DC Characteristics (5V Devices)
Test Condition
Symbol
Parameter
(in addition to those
in Table 86, page 122)
Min.
Typ.
Max.
Unit
Input High Voltage (Ports 1, 2,
3, 4[Bits 7,6,5,4,3,1,0], XTAL1,
RESET)
V
4.5V < V < 5.5V
0.7V
V
V
+ 0.5
V
V
V
IH
CC
CC
CC
Input High Voltage (Ports A, B,
C, D, 4[Bit 2])
V
IH1
4.5V < V < 5.5V
+ 0.5
2.0
CC
CC
Input Low Voltage (Ports 1, 2,
3, 4[Bits 7,6,5,4,3,1,0], XTAL1,
RESET)
V
4.5V < V < 5.5V
V
V
– 0.5
0.3V
CC
IL
CC
SS
Input Low Voltage
(Ports A, B, C, D)
4.5V < V < 5.5V
–0.5
– 0.5
0.8
0.8
0.1
V
V
V
CC
V
V
IL1
OL
Input Low Voltage
(Port 4[Bit 2])
4.5V < V < 5.5V
CC
SS
I
OL
= 20µA
0.01
0.25
V
CC
= 4.5V
Output Low Voltage
(Ports A,B,C,D)
I
V
= 8mA
= 4.5V
OL
0.45
0.45
0.45
V
V
V
V
CC
Output Low Voltage
(Ports 1,2,3,4, WR, RD)
V
V
I
= 1.6mA
OL1
OL
Output Low Voltage
(Port 0, ALE, PSEN)
I
= 3.2mA
= –20µA
OL2
OL
I
OH
4.4
2.4
4.49
3.9
V
CC
= 4.5V
Output High Voltage
(Ports A,B,C,D)
V
OH
I
= –2mA
OH
V
V
CC
= 4.5V
I
I
= –80µA
= –10µA
= –800µA
= –80µA
= –1µA
2.4
4.05
2.4
V
V
V
V
V
V
OH
Output High Voltage
(Ports 1,2,3,4, WR, RD)
V
OH1
OH
I
OH
Output High Voltage (Port 0 in
ext. Bus Mode, ALE, PSEN)
V
V
OH2
I
4.05
OH
Output High Voltage V
I
V
– 0.8
STBY
OH3
STBYON
OH
V
Low Voltage RESET
0.1V hysteresis
= 3.2mA
3.75
2.0
4.0
4.25
3.0
LVR
XTAL Open Bias Voltage
(XTAL1, XTAL2)
V
I
OL
V
OP
V
(min) for Flash Erase and
CC
V
2.5
2.0
2
4.2
V
V
V
LKO
Program
V
STBY
V
– 0.2
CC
SRAM (PSD) Standby Voltage
SRAM (PSD) Data Retention
Voltage
V
Only on V
STBY
DF
V
= 0.45V
Logic '0' Input Current
(Ports 1,2,3,4)
IN
I
–10
–65
–50
µA
µA
IL
(0V for Port 4[pin 2])
V
= 3.5V
Logic 1-to-0 Transition Current
(Ports 1,2,3,4)
IN
I
–650
TL
(2.5V for Port 4[pin 2])
124/152
STMICROELECTRONICS [ ST ]
