Electrical characteristics
STM8S903K3 STM8S903F3
Figure 41: SPI timing diagram - master mode(1)
High
NSS input
t
c(SCK)
CPHA=0
CPOL=0
CPHA=0
CPOL=1
CPHA=1
CPOL=0
CPHA=1
CPOL=1
t
t
t
t
w(SCKH)
w(SCKL)
r(SCK)
f(SCK)
t
su(MI)
MISO
MSBIN
t
BIT6 IN
LSB IN
INPUT
h(MI)
MOSI
M SB OUT
BIT1 OUT
LSB OUT
OUTUT
t
t
v(MO)
h(MO)
ai14136b
1. Measurement points are made at CMOS levels: 0.3 VDD and 0.7 VDD.
10.3.9
I2C interface characteristics
Table 46: I2C characteristics
Symbol Parameter
Unit
Standard mode I2C
Fast mode I2C(1)
Min(2)
4.7
Max(2) Min(2) Max(2)
tw(SCLL) SCL clock low time
tw(SCLH) SCL clock high time
tsu(SDA) SDA setup time
-
-
-
-
1.3
0.6
100
0(4)
-
μs
4.0
-
250
0(3)
-
th(SDA)
SDA data hold time
900(3)
tr(SDA)
tr(SCL)
SDA and SCL rise time
-
-
1000
300
-
-
300
300
ns
μs
tf(SDA)
tf(SCL)
SDA and SCL fall time
th(STA)
START condition hold time
4.0
4.7
-
-
0.6
0.6
-
-
tsu(STA) Repeated START condition setup time
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