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ST92F150JDV1Q6 参数 Datasheet PDF下载

ST92F150JDV1Q6图片预览
型号: ST92F150JDV1Q6
PDF下载: 下载PDF文件 查看货源
内容描述: 8月16日- BIT单电压闪存单片机系列内存, E3 TMEMULATED EEPROM , CAN 2.0B和J1850 BLPD [8/16-BIT SINGLE VOLTAGE FLASH MCU FAMILY WITH RAM, E3 TMEMULATED EEPROM, CAN 2.0B AND J1850 BLPD]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
文件页数/大小: 426 页 / 3830 K
品牌: STMICROELECTRONICS [ ST ]
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ST92F124/F150/F250 - INTERRUPTS  
ARBITRATION MODES (Cont’d)  
End of Interrupt Routine  
– If ENCSR is reset, CSR is used instead of ISR,  
unless the program returns to another nested  
routine.  
The iret Interrupt Return instruction executes  
the following steps:  
The suspended routine thus resumes at the inter-  
rupted instruction.  
– The Flag register is popped from system stack.  
– If ENCSR is set, CSR is popped from system  
stack.  
Figure 48 contains a simple example, showing that  
if the ei instruction is not used in the interrupt  
service routines, nested and concurrent modes  
are equivalent.  
– The PC high byte is popped from system stack.  
– The PC low byte is popped from system stack.  
Figure 49 contains a more complex example  
showing how nested mode allows nested interrupt  
processing (enabled inside the interrupt service  
routinesi using the ei instruction) according to  
their priority level.  
– All unmasked Interrupts are enabled by setting  
the CICR.IEN bit.  
– The priority level of the interrupted routine is  
popped from the special register (NICR) and  
copied into CPL.  
Figure 49. Complex Example of a Sequence of Interrupt Requests with:  
- Nested mode  
- IEN set to 1 during the interrupt routine execution  
Priority Level of  
Interrupt Request  
0
INTERRUPT 0 HAS PRIORITY LEVEL 0  
INTERRUPT 2 HAS PRIORITY LEVEL 2  
INTERRUPT 3 HAS PRIORITY LEVEL 3  
INTERRUPT 4 HAS PRIORITY LEVEL 4  
INTERRUPT 5 HAS PRIORITY LEVEL 5  
INTERRUPT 6 HAS PRIORITY LEVEL 6  
INT 0  
CPL=0  
CPL6 > CPL3:  
INT6 pending  
1
2
3
INT0  
INT 2  
INT 2  
INT 2  
CPL=2  
INT6  
CPL=2  
CPL=2  
INT 3  
ei  
INT2  
CPL=3  
ei  
INT2  
INT3  
INT4  
4
5
6
7
INT 4  
CPL=4  
INT 4  
CPL=4  
CPL2 < CPL4:  
Serviced just after ei  
ei  
INT 5  
CPL=5  
INT 5  
CPL=5  
ei  
INT 6  
CPL=6  
ei  
INT5  
MAIN  
CPL is set to 7  
MAIN  
CPL=7  
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