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ST92F150JDV1Q6 参数 Datasheet PDF下载

ST92F150JDV1Q6图片预览
型号: ST92F150JDV1Q6
PDF下载: 下载PDF文件 查看货源
内容描述: 8月16日- BIT单电压闪存单片机系列内存, E3 TMEMULATED EEPROM , CAN 2.0B和J1850 BLPD [8/16-BIT SINGLE VOLTAGE FLASH MCU FAMILY WITH RAM, E3 TMEMULATED EEPROM, CAN 2.0B AND J1850 BLPD]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
文件页数/大小: 426 页 / 3830 K
品牌: STMICROELECTRONICS [ ST ]
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J1850 Byte Level Protocol Decoder (JBLPD)  
10.9 J1850 Byte Level Protocol Decoder (JBLPD)  
10.9.1 Introduction  
10.9.2 Main Features  
SAE J1850 compatible  
Digital filter  
The JBLPD is used to exchange data between the  
ST9 microcontroller and an external J1850 trans-  
ceiver I.C.  
In-Frame Responses of type 0, 1, 2, 3 supported  
The JBLPD transmits a string of variable pulse  
width (VPW) symbols to the transceiver. It also re-  
ceives VPW encoded symbols from the transceiv-  
er, decodes them and places the data in a register.  
with automatic normalization bit  
Programmable External Loop Delay  
Diagnostic 4x time mode  
Diagnostic Local Loopback mode  
In-frame responses of type 0, 1, 2 and 3 are sup-  
ported and the appropriate normalization bit is  
generated automatically. The JBLPD filters out  
any incoming messages which it does not care to  
receive. It also includes a programmable external  
loop delay.  
Wide range of MCU internal frequencies  
allowed  
Low power consumption mode (JBLPD  
suspended)  
Very low power consumption mode (JBLPD  
disabled)  
Don’t care message filter  
The JBLPD uses two signals to communicate with  
the transceiver:  
– VPWI (input)  
Selectable VPWI input polarity  
Selectable Normalization Bit symbol form  
6 maskable interrupts  
– VPWO (output)  
DMA transmission and reception with End Of  
Block interrupts  
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