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ST10F276S-4T3 参数 Datasheet PDF下载

ST10F276S-4T3图片预览
型号: ST10F276S-4T3
PDF下载: 下载PDF文件 查看货源
内容描述: 16位MCU与MAC单元832 KB的闪存和68 KB的RAM [16-bit MCU with MAC unit 832 Kbyte Flash memory and 68 Kbyte RAM]
分类和应用: 闪存
文件页数/大小: 235 页 / 2491 K
品牌: STMICROELECTRONICS [ ST ]
 浏览型号ST10F276S-4T3的Datasheet PDF文件第221页浏览型号ST10F276S-4T3的Datasheet PDF文件第222页浏览型号ST10F276S-4T3的Datasheet PDF文件第223页浏览型号ST10F276S-4T3的Datasheet PDF文件第224页浏览型号ST10F276S-4T3的Datasheet PDF文件第226页浏览型号ST10F276S-4T3的Datasheet PDF文件第227页浏览型号ST10F276S-4T3的Datasheet PDF文件第228页浏览型号ST10F276S-4T3的Datasheet PDF文件第229页  
ST10F276E  
Electrical characteristics  
Figure 68. SSC master timing  
T
T
T
ꢈꢉꢁ  
ꢈꢉꢉ  
ꢈꢉꢀ  
ꢍꢀꢏ  
ꢍꢁꢏ  
3#,+  
T
T
ꢈꢉꢈ  
ꢈꢉꢇ  
T
ꢈꢉꢃ  
T
T
T
ꢈꢉꢃ  
ꢈꢉꢃ  
ꢈꢉꢄ  
-432  
-234  
ꢀST OUT BIT  
ꢁND OUT BIT  
,AST OUT BIT  
T
T
T
T
ꢈꢉꢆ  
ꢈꢉꢊ  
ꢈꢉꢆ  
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ꢁND IN BIT  
ꢀST IN BIT  
,AST IN BIT  
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1. The phase and polarity of shift and latch edge of SCLK is programmable. This figure uses the leading clock  
edge as shift edge (drawn in bold), with latch on trailing edge (SSCPH = 0b), idle clock line is low, leading  
clock edge is low-to-high transition (SSCPO = 0b).  
2. The bit timing is repeated for all bits to be transmitted or received.  
Doc ID 12303 Rev 3  
225/235  
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