NAND128-A, NAND256-A, NAND512-A, NAND01G-A
Table 6. Address Insertion, x8 Devices
Bus Cycle
I/O7
I/O6
I/O5
I/O4
I/O3
I/O2
A2
I/O1
A1
I/O0
A0
st
A7
A6
A5
A4
A3
1
nd
A16
A24
A15
A23
A14
A22
A13
A21
A12
A20
A11
A19
A10
A18
A26
A9
2
rd
A17
A25
3
th(4)
V
V
IL
V
V
IL
V
V
IL
IL
IL
IL
4
Note: 1. A8 is set Low or High by the 00h or 01h Command, see Pointer Operations section.
2. Any additional address input cycles will be ignored.
3. The 4th cycle is only required for 512Mb and 1Gb devices.
Table 7. Address Insertion, x16 Devices
Bus
Cycle
I/O8-
I/O15
I/O7
I/O6
I/O5
I/O4
I/O3
I/O2
I/O1
I/O0
st
X
X
X
X
A7
A6
A5
A4
A3
A2
A1
A0
A9
1
nd
A16
A24
A15
A23
A14
A22
A13
A21
A12
A20
A11
A19
A10
A18
A26
2
rd
A17
A25
3
th(4)
V
V
V
V
V
IL
V
IL
IL
IL
IL
IL
4
Note: 1. A8 is Don’t Care in x16 devices.
2. Any additional address input cycles will be ignored.
3. The 01h Command is not used in x16 devices.
4. The 4th cycle is only required for 512Mb and 1Gb devices.
Table 8. Address Definitions
Address
Definition
A0 - A7
A9 - A26
A9 - A13
A14 - A26
Column Address
Page Address
Address in Block
Block Address
A8 is set Low or High by the 00h or 01h Command, and is
Don’t Care in x16 devices
A8
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STMICROELECTRONICS [ ST ]
