M27C2001
Figure 2A. DIP Pin Connections
Figure 2B. LCC Pin Connections
VPP
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
Q0
Q1
Q2
VSS
1
32
2
31
3
30
4
29
5
28
6
27
7
26
8
25
M27C2001
9
24
10
23
11
22
12
21
13
20
14
19
15
18
16
17
AI00717
VCC
P
A17
A14
A13
A8
A9
A11
G
A10
E
Q7
Q6
Q5
Q4
Q3
A7
A6
A5
A4
A3
A2
A1
A0
Q0
A12
A15
A16
VPP
VCC
P
A17
1 32
A14
A13
A8
A9
A11
G
A10
E
Q7
9
M27C2001
25
17
VSS
Q3
Q4
Q5
Q6
AI00718
Figure 2C. TSOP Pin Connections
A11
A9
A8
A13
A14
A17
P
VCC
VPP
A16
A15
A12
A7
A6
A5
A4
1
32
8
9
M27C2001
(Normal)
25
24
16
17
AI01153B
G
A10
E
Q7
Q6
Q5
Q4
Q3
VSS
Q2
Q1
Q0
A0
A1
A2
A3
The operationg modes of the M27C2001 are listed
in the Operating Modes table. A single power sup-
ply is required in the read mode. All inputs are TTL
levels except for V
PP
and 12V on A9 for Electronic
Signature.
Read Mode
The M27C2001 has two control functions, both of
which must be logically active in order to obtain
data at the outputs. Chip Enable (E) is the power
control and should be used for device selection.
Output Enable (G) is the output control and should
be used to gate data to the output pins, indepen-
dent of device selection. Assuming that the ad-
dresses are stable, the address access time
(t
AVQV
) is equal to the delay from E to output
(t
ELQV
). Data is available at the output after a delay
of t
GLQV
from the falling edge of G, assuming that
E has been low and the addresses have been sta-
ble for at least t
AVQV
-t
GLQV
.
Standby Mode
The M27C2001 has a standby mode which reduc-
es the supply current from 30mA to 100µA. The
M27C2001 is placed in the standby mode by ap-
plying a CMOS high signal to the E input. When in
the standby mode, the outputs are in a high imped-
ance state, independent of the G input.
2/16
Q1
Q2
STMICROELECTRONICS [ STMICROELECTRONICS ]
