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M27C2001-12F1X 参数 Datasheet PDF下载

M27C2001-12F1X图片预览
型号: M27C2001-12F1X
PDF下载: 下载PDF文件 查看货源
内容描述: 2兆位( 256Kb的×8) UV EPROM和OTP EPROM [2 Mbit (256Kb x 8) UV EPROM and OTP EPROM]
分类和应用: 存储内存集成电路可编程只读存储器电动程控只读存储器
文件页数/大小: 16 页 / 115 K
品牌: STMICROELECTRONICS [ STMICROELECTRONICS ]
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M27C2001
Figure 6. Programming and Verify Modes AC Waveforms
A0-A17
tAVPL
Q0-Q7
tQVPL
VPP
tVPHPL
VCC
tVCHPL
E
tELPL
P
tPLPH
G
tQXGL
tGHAX
tGLQV
tGHQZ
DATA IN
tPHQX
DATA OUT
VALID
PROGRAM
VERIFY
AI00720
Figure 7. Programming Flowchart
VCC = 6.25V, VPP = 12.75V
n=0
P = 100µs Pulse
NO
++n
= 25
YES
NO
VERIFY
YES
Last
Addr
NO
++ Addr
FAIL
YES
CHECK ALL BYTES
1st: VCC = 6V
2nd: VCC = 4.2V
AI00715C
PRESTO II Programming Algorithm
PRESTO II Programming Algorithm allows the
whole array to be programmed with a guaranteed
margin, in a typical time of 26.5 seconds. Pro-
gramming with PRESTO II consists of applying a
sequence of 100µs program pulses to each byte
until a correct verify occurs (see Figure 7). During
programming and verify operation, a MARGIN
MODE circuit is automatically activated in order to
guarantee that each cell is programmed with
enough margin. No overprogram pulse is applied
since the verify in MARGIN MODE provides the
necessary margin to each programmed cell.
Program Inhibit
Programming of multiple M27C2001s in parallel
with different data is also easily accomplished. Ex-
cept for E, all like inputs including G of the parallel
M27C2001 may be common. A TTL low level
pulse applied to a M27C2001’s P input, with E low
and V
PP
at 12.75V, will program that M27C2001.
A high level E input inhibits the other M27C2001s
from being programmed.
Program Verify
A verify (read) should be performed on the pro-
grammed bits to determine that they were correct-
ly programmed. The verify is accomplished with E
and G at V
IL
, P at V
IH
, V
PP
at 12.75V and V
CC
at
6.25V.
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