M25PE10, M25PE20
Sector Erase (SE)
struction is not executed. As soon as Chip Select
(S) is driven High, the self-timed Sector Erase cy-
The Sector Erase (SE) instruction sets to 1 (FFh)
all bits inside the chosen sector. Before it can be
accepted, a Write Enable (WREN) instruction
must previously have been executed. After the
Write Enable (WREN) instruction has been decod-
ed, the device sets the Write Enable Latch (WEL).
The Sector Erase (SE) instruction is entered by
driving Chip Select (S) Low, followed by the in-
struction code, and three address Bytes on Serial
Data Input (D). Any address inside the Sector (see
Table 3.) is a valid address for the Sector Erase
(SE) instruction. Chip Select (S) must be driven
Low for the entire duration of the sequence.
cle (whose duration is t ) is initiated. While the
SE
Sector Erase cycle is in progress, the Status Reg-
ister may be read to check the value of the Write
In Progress (WIP) bit. The Write In Progress (WIP)
bit is 1 during the self-timed Sector Erase cycle,
and is 0 when it is completed. At some unspecified
time before the cycle is complete, the Write Enable
Latch (WEL) bit is reset.
A Sector Erase (SE) instruction applied to a sector
that contains a page that is Hardware Protected is
not executed.
Any Sector Erase (SE) instruction, while an Erase,
Program or Write cycle is in progress, is rejected
without having any effects on the cycle that is in
progress.
The instruction sequence is shown in Figure 17.
Chip Select (S) must be driven High after the
eighth bit of the last address Byte has been
latched in, otherwise the Sector Erase (SE) in-
Figure 17. Sector Erase (SE) Instruction Sequence
S
0
1
2
3
4
5
6
7
8
9
29 30 31
C
D
Instruction
24 Bit Address
23 22
MSB
2
0
1
AI03751D
Note: Address bits A23 to A18 are Don’t Care in the M25PE20. Address bits A23 to A17 are Don’t Care in the M25PE10.
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STMICROELECTRONICS [ ST ]
