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L7250 参数 Datasheet PDF下载

L7250图片预览
型号: L7250
PDF下载: 下载PDF文件 查看货源
内容描述: 5V和12V的主轴和VCM电机驱动器 [5V & 12V SPINDLE AND VCM MOTORS DRIVER]
分类和应用: 驱动器电机
文件页数/大小: 46 页 / 478 K
品牌: STMICROELECTRONICS [ ST ]
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L7250  
2
SPINDLE MOTOR CONTROLLER  
Figure 3.  
SUPPLY  
VOLTAGE  
COMPENSATION  
VM  
SMOOTHDRIVE  
MODULATED  
DUTY CYCLE  
ADC  
KVAL  
SMOOTHDRIVE  
RAW  
DUTY CYCLE  
REGISTER  
START-OF-COUNT  
TIME DOMAIN  
DUTY CYCLE  
SIGNALS  
KVAL  
VM  
VM  
VM  
HGU  
SMOOTHDRIVE  
6 State  
or  
FET  
GATE  
DRIVE  
MOTU  
PROFILE  
MEMORY/  
LOGIC  
DIGITAL  
MULTIPLIER  
COUNTER  
&
COMPARATORS  
Sine  
LGU  
Mode  
MEMORY  
ADDRESS  
COUNTER  
(N=48)  
COARSE  
PHASE  
ADVANCE  
BITS  
HGV  
MOTV  
LGV  
FET  
GATE  
DRIVE  
WINDOW  
TRISTATE  
CMD  
LOADCP  
BIT  
FSCAN  
SPINDLE  
MOTOR  
OLSIX/OLSIN  
HGW  
MOTW  
LGW  
OR CLSIX/CLSIN  
FET  
GATE  
DRIVE  
ADVANCE  
BIT  
BEMF  
COMP.  
ZERO  
WINDOW  
MASK  
FINE  
PHASE  
ADVANCE  
BITS  
CROSSING  
PERIOD  
FSCAN  
COUNTER  
Tc  
ZC  
CTAP  
COUNTER  
16+4 BIT  
xx  
xx  
PWM MASK  
CURRENT  
LIMIT  
COMP.  
SPSENH  
SYSCLK  
16.5MHZ  
MASK  
REGISTERS  
CUR DAC  
2.1 Spindle Smoothdrive Functionality  
L7250 utilizes ST's proprietary Smoothdrive commutation algorithm. Smoothdrive is a voltage mode pseudo-  
sinusoidal spindle drive scheme where the duty cycles of the three windings are modulated to form sinusoidal  
voltages across each winding. The system determines the shape and amplitude of the driving voltages in a  
completely digital manner.  
2.2 SYSCLK  
The Smoothdrive system clock comes through the SYSCLK pin.  
The system expects either 33MHz or 16.5MHz on this pin, and needs 16.5MHz internally. A SYSCLK divide by  
two can be enabled by a SPI register bit PRESMO to accomodate a 33MHz external clock.  
2.3 Smoothdrive Wave shape  
The basic Smooth drive wave shape is stored in digital memory. A voltage profile designed to reduce switching  
losses and increase the voltage headroom has been implemented. Essentially, two phases are PWM'ed, while  
the low side driver of the third phase is on at 100% duty cycle. The PWM duty cycles are modulated in such a  
way as to result in sinusoidal currents on all 3 motor phases. Driving in this manner, as opposed to driving true  
sinusoids on all three phases, results in improved headroom and efficiency, approaching that of conventional 6  
state commutation.  
The system is phase locked to the motor by sensing one BEMF zero crossing on one winding, once per electrical  
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