32 Mbit Concurrent SuperFlash
SST36VF3203 / SST36VF3204
Data Sheet
T
T
AA
RC
ADDRESSES
CE#
T
CE
T
OE
OE#
T
OHZ
T
OLZ
V
IH
WE#
T
CHZ
T
OH
T
CLZ
HIGH-Z
HIGH-Z
DQ
15-0
DATA VALID
DATA VALID
1270 F03.0
FIGURE 3: READ CYCLE TIMING DIAGRAM
T
BP
555
2AA
555
ADDR
ADDRESSES
WE#
T
AH
T
WP
T
WPH
T
AS
OE#
CE#
T
CH
T
BY
T
T
BR
CS
RY/BY#
T
DS
T
DH
DQ
VALID
15-0
XXAA
XX55
XXA0
DATA
WORD
(ADDR/DATA)
1270 F04.0
Note: X can be V or V but no other value.
IL
IH,
FIGURE 4: WE# CONTROLLED PROGRAM CYCLE TIMING DIAGRAM
©2005 Silicon Storage Technology, Inc.
S71270-03-000
7/06
19