16 Mbit Concurrent SuperFlash + 2 / 4 Mbit SRAM ComboMemory
SST34HF1621 / SST34HF1641
Data Sheet
TABLE 14: FLASH READ CYCLE TIMING PARAMETERS VDD = 2.7-3.3V
SST34HF1621/1641-70
SST34HF1621/1641-90
Symbol
TRC
Parameter
Min
Max
Min
Max
Units
ns
Read Cycle Time
70
90
TCE
Chip Enable Access Time
Address Access Time
70
70
35
90
90
45
ns
TAA
ns
TOE
Output Enable Access Time
BEF# Low to Active Output
OE# Low to Active Output
BEF# High to High-Z Output
OE# High to High-Z Output
Output Hold from Address Change
RST# Pulse Width
ns
1
TCLZ
0
0
0
0
ns
1
TOLZ
ns
1
TCHZ
20
20
30
30
ns
1
TOHZ
ns
1
TOH
0
0
ns
1
TRP
500
50
500
50
ns
1
TRHR
RST# High Before Read
RST# Pin Low to Read
ns
1,2
TRY
150
150
µs
T14.4 523
1. This parameter is measured only for initial qualification and after the design or process change that could affect this parameter.
2. This parameter applies to Sector-Erase and Block-Erase operations. This parameter does not apply to Chip-Erase operations.
TABLE 15: FLASH PROGRAM/ERASE CYCLE TIMING PARAMETERS
Symbol
TBP
Parameter
Min
Max
Units
µs
Word-Program Time
Address Setup Time
Address Hold Time
WE# and BEF# Setup Time
WE# and BEF# Hold Time
OE# High Setup Time
OE# High Hold Time
BEF# Pulse Width
WE# Pulse Width
20
TAS
0
40
0
ns
TAH
ns
TCS
ns
TCH
0
ns
TOES
TOEH
TCP
0
ns
10
40
40
30
30
30
0
ns
ns
TWP
ns
1
TWPH
WE# Pulse Width High
BEF# Pulse Width High
Data Setup Time
ns
1
TCPH
ns
TDS
ns
1
TDH
Data Hold Time
ns
1
TIDA
Software ID Access and Exit Time
RY/BY# Delay Time
Bus Recovery Time
Sector-Erase
150
ns
1
TBY
90
ns
TBR
TSE
TBE
TSCE
1
µs
25
ms
ms
Block-Erase
25
Chip-Erase
100
ms
T15.3 523
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
©2001 Silicon Storage Technology, Inc.
S71172-05-000 10/01 523
15
SST [ SILICON STORAGE TECHNOLOGY, INC ]
