2 Mbit Page-Mode EEPROM
SST29EE020 / SST29LE020 / SST29VE020
Data Sheet
TABLE 13: PAGE-WRITE CYCLE TIMING PARAMETERS
SST29EE020
SST29LE/VE020
Symbol
TWC
TAS
Parameter
Min
Max
Min
Max
Units
ms
ns
Write Cycle (Erase and Program)
Address Setup Time
Address Hold Time
10
10
0
50
0
0
70
0
TAH
ns
TCS
WE# and CE# Setup Time
WE# and CE# Hold Time
OE# High Setup Time
OE# High Hold Time
CE# Pulse Width
ns
TCH
0
0
ns
TOES
TOEH
TCP
0
0
ns
0
0
ns
70
70
35
0
120
120
50
0
ns
TWP
TDS
WE# Pulse Width
ns
Data Setup Time
ns
1
TDH
Data Hold Time
ns
1
TBLC
Byte Load Cycle Time
Byte Load Cycle Time
Software ID Access and Exit Time
Software Chip-Erase
0.05
200
100
0.05
200
100
µs
1
TBLCO
µs
1
TIDA
10
20
10
20
µs
TSCE
ms
T13.5307
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
©2001 Silicon Storage Technology, Inc.
S71062-06-000 6/01 307
11
SST [ SILICON STORAGE TECHNOLOGY, INC ]
