2 Mbit Page-Mode EEPROM
SST29EE020 / SST29LE020 / SST29VE020
Data Sheet
ADDRESS A
17-0
CE#
OE#
T
T
CE
T
OEH
T
OES
OE
WE#
DQ
6
T
+ T
BLCO
WC
TWO READ CYCLES
WITH SAME OUTPUTS
307 ILL F07.1
FIGURE 8: TOGGLE BIT TIMING DIAGRAM
Six-Byte Sequence for Disabling
Software Data Protection
T
WC
ADDRESS A
14-0
5555
2AAA
5555
5555
2AAA
5555
DQ
AA
55
80
AA
55
20
7-0
CE#
OE#
WE#
T
BLCO
T
WP
T
BLC
SW0
SW1
SW2
SW3
SW4
SW5
307 ILL F08.1
FIGURE 9: SOFTWARE DATA PROTECT DISABLE TIMING DIAGRAM
©2001 Silicon Storage Technology, Inc.
S71062-06-000 6/01 307
14