欢迎访问ic37.com |
会员登录 免费注册
发布采购

SST25VF016B_11 参数 Datasheet PDF下载

SST25VF016B_11图片预览
型号: SST25VF016B_11
PDF下载: 下载PDF文件 查看货源
内容描述: 16兆位的SPI串行闪存 [16 Mbit SPI Serial Flash]
分类和应用: 闪存
文件页数/大小: 31 页 / 3300 K
品牌: SST [ SILICON STORAGE TECHNOLOGY, INC ]
 浏览型号SST25VF016B_11的Datasheet PDF文件第8页浏览型号SST25VF016B_11的Datasheet PDF文件第9页浏览型号SST25VF016B_11的Datasheet PDF文件第10页浏览型号SST25VF016B_11的Datasheet PDF文件第11页浏览型号SST25VF016B_11的Datasheet PDF文件第13页浏览型号SST25VF016B_11的Datasheet PDF文件第14页浏览型号SST25VF016B_11的Datasheet PDF文件第15页浏览型号SST25VF016B_11的Datasheet PDF文件第16页  
16 Mbit SPI Serial Flash  
SST25VF016B  
A Microchip Technology Company  
Data Sheet  
Auto Address Increment (AAI) Word-Program  
The AAI program instruction allows multiple bytes of data to be programmed without re-issuing the  
next sequential address location. This feature decreases total programming time when multiple bytes  
or entire memory array is to be programmed. An AAI Word program instruction pointing to a protected  
memory area will be ignored. The selected address range must be in the erased state (FFH) when ini-  
tiating an AAI Word Program operation. While within AAI Word Programming sequence, only the fol-  
lowing instructions are valid: for software end-of-write detection—AAI Word (ADH), WRDI (04H), and  
RDSR (05H); for hardware end-of-write detection—AAI Word (ADH) and WRDI (04H). There are three  
options to determine the completion of each AAI Word program cycle: hardware detection by reading  
the Serial Output, software detection by polling the BUSY bit in the software status register, or wait TBP.  
Refer to“End-of-Write Detection” for details.  
Prior to any write operation, the Write-Enable (WREN) instruction must be executed. Initiate the AAI  
Word Program instruction by executing an 8-bit command, ADH, followed by address bits [A23-A0]. Fol-  
lowing the addresses, two bytes of data are input sequentially, each one from MSB (Bit 7) to LSB (Bit  
0). The first byte of data (D0) is programmed into the initial address [A23-A1] with A0=0, the second  
byte of Data (D1) is programmed into the initial address [A23-A1] with A0=1. CE# must be driven high  
before executing the AAI Word Program instruction. Check the BUSY status before entering the next  
valid command. Once the device indicates it is no longer busy, data for the next two sequential  
addresses may be programmed, followed by the next two, and so on.  
When programming the last desired word, or the highest unprotected memory address, check the busy  
status using either the hardware or software (RDSR instruction) method to check for program comple-  
tion. Once programming is complete, use the applicable method to terminate AAI. If the device is in  
Software End-of-Write Detection mode, execute the Write-Disable (WRDI) instruction, 04H. If the  
device is in AAI Hardware End-of-Write Detection mode, execute the Write-Disable (WRDI) instruction,  
04H, followed by the 8-bit DBSY command, 80H. There is no wrap mode during AAI programming  
once the highest unprotected memory address is reached. See Figures 10 and 11 for the AAI Word  
programming sequence.  
End-of-Write Detection  
There are three methods to determine completion of a program cycle during AAI Word programming:  
hardware detection by reading the Serial Output, software detection by polling the BUSY bit in the Soft-  
ware Status Register, or wait TBP. The Hardware End-of-Write detection method is described in the  
section below.  
Hardware End-of-Write Detection  
The Hardware End-of-Write detection method eliminates the overhead of polling the Busy bit in the  
Software Status Register during an AAI Word program operation. The 8-bit command, 70H, configures  
the Serial Output (SO) pin to indicate Flash Busy status during AAI Word programming. (see Figure 8)  
The 8-bit command, 70H, must be executed prior to initiating an AAI Word-Program instruction. Once  
an internal programming operation begins, asserting CE# will immediately drive the status of the inter-  
nal flash status on the SO pin. A ‘0’ indicates the device is busy and a ‘1’ indicates the device is ready  
for the next instruction. De-asserting CE# will return the SO pin to tri-state. While in AAI and Hardware  
End-of-Write detection mode, the only valid instructions are AAI Word (ADH) and WRDI (04H).  
To exit AAI Hardware End-of-Write detection, first execute WRDI instruction, 04H, to reset the Write-  
Enable-Latch bit (WEL=0) and AAI bit. Then execute the 8-bit DBSY command, 80H, to disable RY/  
BY# status during the AAI command. See Figures 9 and 10.  
©2011 Silicon Storage Technology, Inc.  
S71271-04-000  
01/11  
12  
 复制成功!