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CYW305OXCT 参数 Datasheet PDF下载

CYW305OXCT图片预览
型号: CYW305OXCT
PDF下载: 下载PDF文件 查看货源
内容描述: 变频控制器系统恢复英特尔集成众核逻辑 [Frequency Controller with System Recovery for Intel Integrated Core Logic]
分类和应用: 晶体外围集成电路光电二极管控制器时钟
文件页数/大小: 20 页 / 183 K
品牌: SPECTRALINEAR [ SPECTRALINEAR INC ]
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W305B  
Byte 11: Recovery Frequency N-Value Register  
Bit  
Name  
Default  
Pin Description  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
ROCV_FREQ_N7  
ROCV_FREQ_N6  
ROCV_FREQ_N5  
ROCV_FREQ_N4  
ROCV_FREQ_N3  
ROCV_FREQ_N2  
ROCV_FREQ_N1  
ROCV_FREQ_N0  
0
0
0
0
0
0
0
0
If ROCV_FREQ_SEL is set, W305B will use the values programmed in  
ROCV_FREQ_N[7:0] and ROCV_FREQ_M[6:0] to determine the recovery  
CPU output frequency.when a Watchdog timer time-out occurs  
The setting of FS_Override bit determines the frequency ratio for CPU,  
SDRAM, AGP and SDRAM. When it is cleared, W305b will use the same  
frequency ratio stated in the Latched FS[4:0] register. When it is set, W305B  
will use the frequency ratio stated in the SEL[4:0] register.  
W305B supports programmable CPU frequency ranging from 50 MHz to  
248 MHz.  
W305Bwill change the output frequency whenever there is an update to either  
ROCV_FREQ_N[7:0] and ROCV_FREQ_M[6:0]. Therefore, it is recom-  
mended to use Word or Block write to update both registers within the same  
SMBus bus operation.  
Byte 12: Recovery Frequency M-Value Register  
Bit  
Name  
Default  
Pin Description  
Bit 7  
ROCV_FREQ_SEL  
0
ROCV_FREQ_SEL determines the source of the recover frequency when a  
Watchdog timer time-out occurs. The clock generator will automatically switch  
to the recovery CPU frequency based on the selection on ROCV_FREQ_SEL.  
0 = From latched FS[4:0]  
1 = From the settings of ROCV_FREQ_N[7:0] & ROCV_FREQ_M[6:0]  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
ROCV_FREQ_M6  
ROCV_FREQ_M5  
ROCV_FREQ_M4  
ROCV_FREQ_M3  
ROCV_FREQ_M2  
ROCV_FREQ_M1  
ROCV_FREQ_M0  
0
0
0
0
0
0
0
If ROCV_FREQ_SEL is set, W305B will use the values programmed in  
ROCV_FREQ_N[7:0] and ROCV_FREQ_M[6:0] to determine the recovery  
CPU output frequency.when a Watchdog timer time-out occurs  
The setting of FS_Override bit determines the frequency ratio for CPU,  
SDRAM, AGP and SDRAM. When it is cleared, W305b will use the same  
frequency ratio stated in the Latched FS[4:0] register. When it is set, W305B  
will use the frequency ratio stated in the SEL[4:0] register.  
W305B supports programmable CPU frequency ranging from 50 MHz to  
248 MHz.  
W305B will change the output frequency whenever there is an update to either  
ROCV_FREQ_N[7:0] and ROCV_FREQ_M[6:0]. Therefore, it is recom-  
mended to use Word or Block write to update both registers within the same  
SMBus bus operation.  
Byte 13: Programmable Frequency Select N-Value Register  
Bit  
Name  
Default  
Pin Description  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
CPU_FSEL_N7  
CPU_FSEL_N6  
CPU_FSEL_N5  
CPU_FSEL_N4  
CPU_FSEL_N3  
CPU_FSEL_N2  
CPU_FSEL_N1  
CPU_FSEL_N0  
0
0
0
0
0
0
0
0
If Prog_Freq_EN is set, W305B will use the values programmed in  
CPU_FSEL_N[7:0] and CPU_FSEL_M[6:0] to determine the CPU output  
frequency. The new frequency will start to load whenever CPU_FSELM[6:0]  
is updated.  
The setting of FS_Override bit determines the frequency ratio for CPU,  
SDRAM, AGP and SDRAM. When it is cleared, W305B will use the same  
frequency ratio stated in the Latched FS[4:0] register. When it is set, W305B  
will use the frequency ratio stated in the SEL[4:0] register.  
W305B supports programmable CPU frequency ranging from 50 MHz to  
248 MHz.  
Rev 1.0,November 20, 2006  
Page 11 of 20  
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