CY28443-3
Byte 11: Control Register 11
Bit
@Pup
0
Name
RESERVED
Description
7
6
5
4
3
RESERVED Set = 0
RESERVED
HW
HW
HW
0
RESERVED
RESERVED
RESERVED
27MHz
RESERVED
RESERVED
27MHz (spread and non-spread) Output Drive Strength
0 = Low, 1 = High
2
1
0
0
0
RESERVED
RESERVED
RESERVED
RESERVED Set = 0
RESERVED Set = 0
RESERVED
HW
Byte 12: Control Register 12
Bit
@Pup
Name
CLKREQ#A
Description
7
6
0
CLKREQ#A Enable
0 = Disable 1 = Enable
1
CLKREQ#B
CLKREQ#B Enable
0 = Disable 1 = Enable
5
4
3
2
1
0
1
1
1
1
1
1
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
Byte 13: Control Register 13
Bit
@Pup
Name
RESERVED
Description
7
6
1
1
RESERVED
96/100M Clock Speed
96/100 SRC Clock Speed
0 = 96MHz 1 = 100MHz
5
4
3
1
1
1
RESERVED
RESERVED
PCI5
RESERVED, Set = 1
RESERVED, Set = 1
PCI5 (Spread and Non-spread) Output Drive Strength
0 = Low, 1 = High
2
1
0
1
1
1
PCI4
PCI3
PCI2
PCI4 (Spread and Non-spread) Output Drive Strength
0 = Low, 1 = High
PCI3 (Spread and Non-spread) Output Drive Strength
0 = Low, 1 = High
PCI2 (Spread and Non-spread) Output Drive Strength
0 = Low, 1 = High
Byte 14: Control Register 14
Bit
@Pup
Name
RESERVED
Description
7
6
5
4
1
0
0
0
RESEREVD
RESERVED
RESERVED
RESERVED
RESERVED
CLKREQ#A
SRC[T/C]5 Control
0 = SRC[T/C]5 not stoppable by CLKREQ#A
1 = SRC[T/C]5 stoppable by CLKREQ#A
Rev 1.0,November 20, 2006
Page 9 of 23
SPECTRALINEAR [ SPECTRALINEAR INC ]
