CY28443-3
Byte 14: Control Register 14 (continued)
Bit
@Pup
Name
CLKREQ#A
Description
3
2
1
0
0
SRC[T/C]4 Control
0 = SRC[T/C]4 not stoppable by CLKREQ#A
1= SRC[T/C]4 stoppable by CLKREQ#A
0
0
0
CLKREQ#A
CLKREQ#A
CLKREQ#A
SRC[T/C]3 Control
0 = SRC[T/C]3 not stoppable by CLKREQ#A
1= SRC[T/C]3 stoppable by CLKREQ#A
SRC[T/C]2 Control
0 = SRC[T/C]2 not stoppable by CLKREQ#A
1= SRC[T/C]2 stoppable by CLKREQ#A
SRC[T/C]1 Control
0 = SRC[T/C]1 not stoppable by CLKREQ#A
1= SRC[T/C]1 stoppable by CLKREQ#A
Byte 15: Control Register 15
Bit
@Pup
Name
CLKREQ#B
Description
7
1
SRC[T/C]8 Control
0 = SRC[T/C]8 not stoppable by CLKREQ#B
1= SRC[T/C]8 stoppable by CLKREQ#B
6
5
4
0
0
0
RESERVED
RESERVED
CLKREQ#B
RESERVED
RESERVED
SRC[T/C]5 Control
0 = SRC[T/C]5 not stoppable by CLKREQ#B
1= SRC[T/C]5 stoppable by CLKREQ#B
3
2
1
0
0
0
0
0
CLKREQ#B
CLKREQ#B
CLKREQ#B
CLKREQ#B
SRC[T/C]4 Control
0 = SRC[T/C]4 not stoppable by CLKREQ#B
1= SRC[T/C]4 stoppable by CLKREQ#B
SRC[T/C]3 Control
0 = SRC[T/C]3 not stoppable by CLKREQ#B
1= SRC[T/C]3 stoppable by CLKREQ#B
SRC[T/C]2 Control
0 = SRC[T/C]2 not stoppable by CLKREQ#B
1= SRC[T/C]2 stoppable by CLKREQ#B
SRC[T/C]1 Control
0 = SRC[T/C]1 not stoppable by CLKREQ#B
1= SRC[T/C]1 stoppable by CLKREQ#B
Rev 1.0,November 20, 2006
Page 10 of 23