D a t a S h e e t ( P r e l i m i n a r y )
11.7.3
S29GL-P Erase and Program Operations
Table 11.6 S29GL-P Erase and Program Operations
Parameter
Speed Options
JEDEC
tAVAV
Std.
tWC
tAS
tASO
tAH
tAHT
tDS
Description
90
100
100
110
110
0
120 130 Unit
120 130
Write Cycle Time (Note 1)
Min
Min
Min
Min
90
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
µs
tAVWL
Address Setup Time
Address Setup Time to OE# low during toggle bit polling
Address Hold Time
15
45
0
tWLAX
Address Hold Time From CE# or OE# high during toggle bit polling Min
tDVWH
tWHDX
Data Setup Time
Data Hold Time
Min
Min
Min
Min
Min
Min
Min
Min
Min
Typ
Typ
30
0
tDH
tCEPH CE# High during toggle bit polling
20
20
0
tOEPH Output Enable High during toggle bit polling
tGHWL Read Recovery Time Before Write (OE# High to WE# Low)
tGHWL
tELWL
tWHEH
tWLWH
tWHDL
tCS
tCH
CE# Setup Time
0
CE# Hold Time
0
tWP
Write Pulse Width
35
30
480
15
tWPH
Write Pulse Width High
Write Buffer Program Operation (Notes 2, 3)
Effective Write Buffer Program Operation (Notes 2, 4) Per Word
Accelerated Effective Write Buffer Program Operation
(Notes 2, 4)
tWHWH1 tWHWH1
Per Word
Typ
13.5
µs
Program Operation (Note 2)
Word
Word
Typ
Typ
Typ
Min
Min
Max
Max
60
54
µs
µs
Accelerated Programming Operation (Note 2)
tWHWH2 tWHWH2 Sector Erase Operation (Note 2)
0.5
250
35
sec
ns
tVHH
tVCS
VHH Rise and Fall Time (Note 1)
VCC Setup Time (Note 1)
µs
tBUSY Erase/Program Valid to RY/BY# Delay
tSEA Sector Erase Timeout
90
ns
50
µs
Notes
1. Not 100% tested.
2. See Section 11.6 for more information.
3. For 1–32 words/1–64 bytes programmed.
4. Effective write buffer specification is based upon a 32-word/64-byte write buffer operation.
5. Unless otherwise indicated, AC specifications for 110 ns speed option are tested with
V
= V = 2.7 V. AC specifications for 110 ns speed options are tested with V = 1.8 V and V = 3.0 V.
CC IO CC
IO
60
S29GL-P MirrorBit® Flash Family
S29GL-P_00_A7 November 8, 2007
SPANSION [ SPANSION ]
