D a t a S h e e t ( P r e l i m i n a r y )
When CS# is driven high, the device transitions from DP mode to the standby mode after a delay of tRES, as
previously described. The RES command always provides access to the Electronic Signature of the device
and can be applied even if DP mode has not been entered.
Any RES command issued while an erase, program, or WRSR operation is in progress not executed, and the
operation continues uninterrupted.
Figure 9.14 Release from Deep Power Down and
Read Electronic Signature (RES) Command Sequence
CS#
SCK
2
28 29 30
31 32 33 34
1
8
36 37
9
35
38
0
3
4
5
6
7
10
t
RES
3 Dummy Bytes
Command
SI
3
1
0
2
23 22
MSB
21
Hi-Z
7
6
5
4
3
2
1
SO
0
MSB
Electronic ID out
Standby Mode
Deep Power-down Mode
Table 9.5 Command Definitions
One-Byte
Address
Bytes
Dummy
Byte
Operation
Command
READ
Description
Command Code
03H (0000 0011)
0BH (0000 1011)
9FH (1001 1111)
Data Bytes
Read Data Bytes
3
3
0
0
1
0
1 to ∞
1 to ∞
1 to 3
FAST_READ
RDID
Read Data Bytes at Higher Speed
Read Identification (Note 1)
Read
Read Manufacture and
Device Identification (Note 1)
READ_ID
90H (1001 0000)
3
0
1 to ∞
WREN
WRDI
SE
Write Enable
06H (0000 0110)
04H (0000 0100)
D8H (1101 1000)
C7H (1100 0111)
02H (0000 0010)
05H (0000 0101)
01H (0000 0001)
B9H (1011 1001)
ABH (1010 1011)
0
0
3
0
3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Write Control
Write Disable
0
Sector Erase
0
Erase
Program
BE
Bulk (Chip) Erase
Page Program
0
PP
1 to 256
RDSR
WRSR
DP
Read from Status Register
Write to Status Register
Deep Power Down
Release from Deep Power Down
1 to ∞
Status Register
1
0
0
Power Saving
RES
Release from Deep Power Down and
Read Electronic Signature (Note 2)
ABH (1010 1011)
0
3
1 to ∞
Notes
1. The S25FL040A has a manufacturer ID of 01h, and a device ID consisting of the memory type (02h) and the memory capacity (12h for uniform sector, 25h for
top boot, 26h for bottom boot).
2. The S25FL040A has an Electronic Signature ID of 12h.
10. Power-up and Power-down
During power-up and power-down, certain conditions must be observed. CS# must follow the voltage applied
on VCC, and must not be driven low to select the device until VCC reaches the allowable values as follows
(see Figure 10.1 and Table 10.1):
At power-up, VCC (min) plus a period of tPU
At power-down, VSS
24
S25FL040A
S25FL040A_00_B0 August 31, 2006