D a t a S h e e t ( P r e l i m i n a r y )
Table 15.1 Test Specifications
Symbol
Parameter
Min
Max
Unit
pF
ns
V
C
Load Capacitance
30
L
Input Rise and Fall Times
Input Pulse Voltage
5
0.2 V to 0.8 V
CC
CC
CC
Input Timing Reference Voltage
Output Timing Reference Voltage
0.3 V to 0.7 V
V
CC
0.5 V
V
CC
16. AC Characteristics
Table 16.1 AC Characteristics
Typ
(Notes)
Max
(Notes)
Symbol
(Notes)
Parameter
SCK Clock Frequency READ command
Min
Unit
F
D.C.
25
MHz
SCK
SCK
CRT
SCK Clock Frequency for:
FAST_READ, PP, SE, BE, DP, RES, WREN, WRDI, RDSR, WRSR
F
D.C.
50
MHz
t
Clock Rise Time (Slew Rate)
Clock Fall Time (Slew Rate)
SCK High Time
0.1
0.1
9
V/ns
V/ns
ns
t
CFT
t
WH
t
SCK Low Time
9
ns
WL
t
CS# High Time
100
5
ns
CS
t
(3)
(3)
(3)
(3)
CS# Setup Time
ns
CSS
CSH
t
CS# HOLD Time
5
ns
t
t
HOLD# Setup Time (relative to SCK)
HOLD# Hold Time (relative to SCK)
HOLD# Setup Time (relative to SCK)
HOLD# Hold Time (relative to SCK)
Output Valid
5
ns
HD
CD
5
ns
t
t
5
ns
HC
CH
5
ns
t
10
10
ns
V
t
Output Hold Time
0
5
5
ns
HO
t
Data in Hold Time
ns
HD:DAT
t
Data in Setup Time
ns
SU:DAT
t
Input Rise Time
5
ns
R
t
Input Fall Time
5
ns
F
t
(3)
HOLD# to Output Low Z
HOLD# to Output High Z
Output Disable Time
10
10
10
ns
LZ
t
(3)
(3)
ns
HZ
t
ns
DIS
t
(3)
(3)
Write Protect Setup Time
Write Protect Hold Time
Write Status Register Time
CS# High to Deep Power Down Mode
Release DP Mode
15
15
ns
WPS
WPH
t
ns
t
67
150
3
ms
μs
μs
ms
sec
sec
W
t
DP
t
30
RES
t
t
t
Page Programming Time
Sector Erase Time
1.5 (1)
0.5 (1)
3 (1)
3 (2)
3 (2)
24 (2)
PP
SE
BE
Bulk Erase Time
Notes
1. Typical program and erase times assume the following conditions: 25°C, V = 3.0V; 10,000 cycles; checkerboard data pattern
CC
2. Under worst-case conditions of 90°C; V = 2.7V; 100,000 cycles
CC
3. Not 100% tested
August 31, 2006 S25FL040A_00_B0
S25FL040A
27
SPANSION [ SPANSION ]
