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AM29LV640MH112RPCI 参数 Datasheet PDF下载

AM29LV640MH112RPCI图片预览
型号: AM29LV640MH112RPCI
PDF下载: 下载PDF文件 查看货源
内容描述: 64兆位(4M ×16位/ 8的M× 8位)的MirrorBit 3.0伏特,只有统一部门快闪记忆体与VersatileI / O控制 [64 Megabit (4 M x 16-Bit/8 M x 8-Bit) MirrorBit 3.0 Volt-only Uniform Sector Flash Memory with VersatileI/O Control]
分类和应用: 闪存内存集成电路
文件页数/大小: 62 页 / 1108 K
品牌: SPANSION [ SPANSION ]
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D A T A S H E E T  
When the Embedded Program algorithm is complete,  
by a third write cycle containing the Write Buffer Load  
command written at the Sector Address in which pro-  
gramming will occur. The fourth cycle writes the sector  
address and the number of word locations, minus one,  
to be programmed. For example, if the system will pro-  
gram 6 unique address locations, then 05h should be  
written to the device. This tells the device how many  
write buffer addresses will be loaded with data and  
therefore when to expect the Program Buffer to Flash  
command. The number of locations to program cannot  
exceed the size of the write buffer or the operation will  
abort.  
the device then returns to the read mode and ad-  
dresses are no longer latched. The system can deter-  
mine the status of the program operation by using  
DQ7 or DQ6. Refer to the Write Operation Status sec-  
tion for information on these status bits.  
Any commands written to the device during the Em-  
bedded Program Algorithm are ignored. Note that a  
hardware reset immediately terminates the program  
operation. The program command sequence should  
be reinitiated once the device has returned to the read  
mode, to ensure data integrity. Note that the ACC  
function and unlock bypass modes are not available  
when the SecSi Sector is enabled.  
The fifth cycle writes the first address location and  
data to be programmed. The write-buffer-page is se-  
lected by address bits AMAX–A4. All subsequent ad-  
dress/data pairs must fall within the  
selected-write-buffer-page. The system then writes the  
remaining address/data pairs into the write buffer.  
Write buffer locations may be loaded in any order.  
Programming is allowed in any sequence and across  
sector boundaries. A bit cannot be programmed  
from “0” back to a “1.Attempting to do so may  
cause the device to set DQ5 = 1, or cause the DQ7  
and DQ6 status bits to indicate the operation was suc-  
cessful. However, a succeeding read will show that the  
data is still “0.Only erase operations can convert a “0”  
to a “1.”  
The write-buffer-page address must be the same for  
all address/data pairs loaded into the write buffer.  
(This means Write Buffer Programming cannot be per-  
formed across multiple write-buffer pages. This also  
means that Write Buffer Programming cannot be per-  
formed across multiple sectors. If the system attempts  
to load programming data outside of the selected  
write-buffer page, the operation will abort.  
Unlock Bypass Command Sequence  
The unlock bypass feature allows the system to pro-  
gram words to the device faster than using the stan-  
dard program command sequence. The unlock bypass  
command sequence is initiated by first writing two un-  
lock cycles. This is followed by a third write cycle con-  
taining the unlock bypass command, 20h. The device  
then enters the unlock bypass mode. A two-cycle un-  
lock bypass program command sequence is all that is  
required to program in this mode. The first cycle in this  
sequence contains the unlock bypass program com-  
mand, A0h; the second cycle contains the program  
address and data. Additional data is programmed in  
the same manner. This mode dispenses with the initial  
two unlock cycles required in the standard program  
command sequence, resulting in faster total program-  
ming time. Tables 10 and 11 show the requirements  
for the command sequence.  
Note that if a Write Buffer address location is loaded  
multiple times, the address/data pair counter will be  
decremented for every data load operation. The host  
system must therefore account for loading a  
write-buffer location more than once. The counter  
decrements for each data load operation, not for each  
unique write-buffer-address location. Note also that if  
an address location is loaded more than once into the  
buffer, the final data loaded for that address will be  
programmed.  
Once the specified number of write buffer locations  
have been loaded, the system must then write the Pro-  
gram Buffer to Flash command at the sector address.  
Any other address and data combination aborts the  
Write Buffer Programming operation. The device then  
begins programming. Data polling should be used  
while monitoring the last address location loaded into  
the write buffer. DQ7, DQ6, DQ5, and DQ1 should be  
monitored to determine the device status during Write  
Buffer Programming.  
During the unlock bypass mode, only the Unlock By-  
pass Program and Unlock Bypass Reset commands  
are valid. To exit the unlock bypass mode, the system  
must issue the two-cycle unlock bypass reset com-  
mand sequence. The first cycle must contain the data  
90h. The second cycle must contain the data 00h. The  
device then returns to the read mode.  
The write-buffer programming operation can be sus-  
pended using the standard program suspend/resume  
commands. Upon successful completion of the Write  
Buffer Programming operation, the device is ready to  
execute the next command.  
Write Buffer Programming  
Write Buffer Programming allows the system write to a  
maximum of 16 words/32 bytes in one programming  
operation. This results in faster effective programming  
time than the standard programming algorithms. The  
Write Buffer Programming command sequence is initi-  
ated by first writing two unlock cycles. This is followed  
The Write Buffer Programming Sequence can be  
aborted in the following ways:  
26  
Am29LV640MH/L  
December 14, 2005