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CXD1968AR 参数 Datasheet PDF下载

CXD1968AR图片预览
型号: CXD1968AR
PDF下载: 下载PDF文件 查看货源
内容描述: DVB -T解调器 [DVB-T Demodulator]
分类和应用:
文件页数/大小: 97 页 / 746 K
品牌: SONY [ SONY CORPORATION ]
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CXD1968AR  
Energy Saving Modes  
Low-power Standby Mode  
This mode reduces the nominal power consumption of the CXD1968AR in IF mode from 140mW to 10mW.  
To obtain maximum benefit it is necessary in software to;  
‹ Disable PLL and stop internal clocks  
‹ Power-down the ADC  
Recovery from low-power standby mode can be achieved by cold reset to all blocks.  
Example: 0xD8 0xA9 0x41 ; power-down PLL and stop clock  
0xD8 0xB9 0x01 ; power-down ADC  
Ultra Low-power Shutdown Mode  
This mode reduces the nominal power consumption of the CXD1968AR in IF mode from 140mW to < 1mW.  
This mode is entered through external control of OSCEN (Pin 40). Grounding this pin will stop the crystal  
oscillator and all on-chip activity.  
The CXD1968AR should be reset when resuming from shutdown mode.  
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