CXD1968AR
Printed Board Layout
Board layout recommendation for CXD1968AR.
Supply and Ground
The CXD1968AR uses three supplies:
1.2V digital
3.3V digital
3.3V analog
for core processing
for clock and I/O
for ADC
All supplies should be decoupled close to the supply pins.
A single ground plane is recommended. However in some situations a split analog/digital ground plane can
offer improved immunity from digital noise. Which option yields better performance will depend upon the
application, ie. location of supplies and interference sources.
These rules should be adhered to, minimizing the risk of performance degradation:
The supplies may be tracked-in (2-layer board) or assigned to a specific power-plane (multilayer).
With either form it is essential to provide a low-impedance ground return to the source of the supply.
A continuous ground plane is preferred as a starting point.
The quiet analog section resides at one corner of the device, Pins 47 to 62. The supply to this section
should feed into and return (via ground) without crossing over the digital section of board.
The digital section should avoid a ground return path through the analog section. Failure to ensure this
may compromise performance of the demodulator.
If it is not possible to ensure uninterrupted ground return paths back to each supply source, it may be
necessary to partition the ground plane to force digital supply ground return currents to avoid the analog
section. It is also advisable to link analog and digital grounds in the area directly below the CXD1968AR.
ESD
Other constraints include immunity from ESD. The instantaneous energy presented by any electrical
impulse should avoid passing close to or through the CXD1968AR. Similarly any connection to the
CXD1968AR should not be susceptible to or protected against ESD pickup. For circuit connections that
may travel outside of the immediate vicinity around the CXD1968AR, it is recommended that low-value
series resistors are employed to limit charge transfer. A typical value would be 47 to 100Ω.
ADC Input
The signal connections to the ADC input should be of similar length and routed together. Failure to do so
may compromise the common mode rejection properties of the differential input circuit. Low-impedance
drive to the ADC will minimize the risk of spurious pickup.
The connection between tuner IF output and the CXD1968AR ADC input should be routed over continuous
analog ground plane.
ADC Reference Components
As for the ADC input connection, the capacitor between DAREFP and DAREFM should be positioned
above continuous analog ground plane.
AGC
The AGC PWM integrating RC filter (either IF or RF when used) should be positioned as close to the
CXD1968AR as practical, ideally within 5mm. The pinout of the CXD1968AR has been improved to assist
this constraint. It will prevent harmonics of the PWM signal breaking through into the IF circuit. The PWM
edges are slew-rate limited but good practice will ensure no interference with the IF input.
- 33 -
SONY [ SONY CORPORATION ]
