CXD1968AR
Serial Output Mode
Fig. 4 illustrates the relationship between the CXD1968AR MPEG2 transport stream outputs when
programed into serial output via I2C. The TSCLK can be programed for the external device to sample on
the rising or falling edge (only rising edge sampling is shown here). The interface supports a number of
additional signals, which indicate the integrity of the output data. Once the demodulator has achieved lock
to the MPEG2 sync byte, the transport stream interface is activated. Data bits are shifted out on TSDATA0
or TSDATA7 (selectable via I2C), starting with the sync byte (47h). The remaining TSDATA signals are held
inactive to reduce noise. The data bit order can be programed as MSB first or LSB first via an I2C register.
The frequency of the TSCLK output is 41MHz (40.96MHz if a 20.48MHz crystal is used) provided transport
stream smoothing is enabled. It is recommended that the serial interface is only used with transport stream
smoothing enabled.
Fig. 4 shows a complete MPEG2 packet consisting of a sync byte (47h) data bytes (dd) and Reed-Solomon
bytes (rr). Note that all the interface control signals have individual programmable polarity; active high
signals are shown in the diagram.
TSCLK has two operating modes and polarity selected via I2C. The operating modes are:
Continuous Mode, where the clock runs continuously at a rate of 1 cycle per bit for all 204 bytes of
each packet and during the gaps between bytes thus requiring the external device to use TSVALID
to validate the 188 data and sync bytes. There are never any gaps between successive bits of the
same byte.
Data Only Mode, where the clock is activated only for 8 pulses on each byte output for each of the
valid data bytes, and remains inactive at all other times. There are never any gaps between
successive bits of the same byte. There are two further sub-modes in TSCLK Data Only Mode
selected via I2C:
188 Mode, where TSCLK is active for the first 188 bytes in the TS packet.
204 Mode, where TSCLK is active for all 204 bytes in the TS packet.
Serial data can be output from either TSDATA0 or TSDATA7 under the control of I2C. MSB/LSB
ordering is also selectable via I2C.
TSVALID identifies the data portion of transport stream packet (excludes R/S bytes). TSVALID has two
operating modes selected depending on the TSCLK operating mode:
TSCLK in Continuous Mode: TSVALID is set active for 8 TSCLK periods for each of the 188 data
and sync bytes.
TSCLK in Data Only Mode: TSVALID is set active during the 188 byte data portion of packet and
inactive during the 16 Reed-Solomon bytes.
TSSYNC identifies the first byte in the transport stream packet and has two operating modes selectable
by I2C:
Byte Mode, where TSSYNC is set active for the first byte of the transport stream packet and reset
inactive for the remainder of the packet.
Bit Mode, where TSSYNC is set active for the first bit of the MPEG2 sync byte and reset inactive for
the remainder of the packet.
TSERR is only set active if the transport stream packet error flag is set in the MPEG2 TS. This signal
indicates that the Reed-Solomon decoder was unable to correct all errors in the packet. There are 2
programmable modes for this signal:
Whole Packet Mode: Active during the entire 204-byte packet.
Data Only Mode: Active during the 188-byte data portion of packet and inactive during the 16 Reed-
Solomon bytes.
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