CXD1968AR
MPEG2-TS Baseband Interface
This block provides parallel and serial MPEG2-TS outputs. Due to the guard intervals and redundancy in the
received COFDM signal, the MPEG2-TS output data can be bursty. MPEG2-TS packets can cross COFDM
symbol boundaries resulting in periodic gaps between successive bytes in an MPEG2-TS packet. For this
reason, the parallel and serial MPEG2-TS interfaces allow several different configurations of the TSCLOCK,
TSERR, TSSYNC and TSVALID signals as described below. This block also smoothes the TS output in the
time domain. This enables the serial interface to output data at the average rate rather than the peak rate and
also reduces jitter on the PCR embedded in the TS.
Transport Stream Smoothing
When enabled, the transport stream smoothing function can operate in one of two modes:
Automatic Mode, where the degree of smoothing is determined by reading the TPS data embedded in
the DVB ensemble.
Manual Mode, where the degree of smoothing is set by programming an I2C register. In manual mode
the quality of the smoothing depends on how the I2C register is programed.
The effect of the transport stream smoothing function is different in parallel and serial modes:
Parallel Mode: The frequency of the TSCLK output is almost the same as the data rate; there will be few
gaps in the transport stream output (signaled by either TSVALID going inactive or a gated TSCLK – see
below). These gaps will never be within the 188 valid data bytes in a packet. This is because TSCLK is
slightly fast, because allowances have to be made for timing offsets between the transmitter and
receiver.
Serial Mode: The frequency of the TSCLK output is fixed at 41MHz (40.96MHz if a 20.48MHz crystal is
used), irrespective of the data rate. The valid data outputs are spread evenly, but there will be gaps
output (signaled by either TSVALID going inactive or a gated TSCLK – see below). These gaps will never
be within a byte.
Parallel Output Mode
Fig. 3 illustrates the relationship between the CXD1968AR MPEG2 transport stream interface signals. The
transport stream clock (TSCLK) can be programed for the external device to sample on the rising or falling
edge (only rising edge sampling is shown here). The interface supports a number of additional signals,
which indicate the integrity of the output data. Once the demodulator has achieved lock to the MPEG2 sync
byte, the transport stream interface is activated. Fig. 3 shows a complete MPEG2 packet consisting of a
sync byte (47h) data bytes (dd) and Reed-Solomon bytes (rr). Note that all the interface control signals
have individual programmable polarity; active high signals are shown in the diagram.
TSCLK has two operating modes selected via I2C:
Continuous Mode, where the clock runs continuously during all 204 bytes of each packet, and during
gaps between bytes, thus requiring the external device to use TSVALID to validate the 188 data and
sync bytes.
Data Only Mode, where the clock is activated only for each of the valid data bytes and remains inactive
at all other times. There are two further sub-modes in TSCLK Data Only Mode selected via I2C:
188 Mode, where TSCLK is active for the first 188 bytes in the TS packet.
204 Mode, where TSCLK is active for all 204 bytes in the TS packet.
TSDATA[7:0] is the byte wide MPEG2-TS data with programmable MSB/LSB ordering. The default is
TSDATA7 being the MSB.
TSVALID identifies the data portion of transport stream packet (excludes R/S bytes). TSVALID has two
operating modes depending on the TSCLK operating mode:
TSCLK in Continuous Mode: TSVALID is set active for 1 TSCLK for each of the 188 data and sync
bytes.
TSCLK in Data Only Mode: TSVALID is set active during the 188 byte data portion of packet and
inactive during the 16 Reed-Solomon bytes.
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SONY [ SONY CORPORATION ]
