t3
nDIR
t4
t1
t2
nSTEP
t5
nDS0
nINDEX
nRDATA
nWDATA
t6
t7
t8
MAX
NAME
PARAMETER
MIN
TYP
UNITS
t1
t2
t3
t4
t5
t6
t7
t8
nDIR Set Up to nSTEP Low
nSTEP Active Time Low
nDIR Hold Time After nSTEP
nSTEP Cycle Time
nDS0-1 Hold Time from nSTEP Low
nINDEX Pulse Width
4
24
96
132
20
2
X*
X*
X*
X*
X*
X*
ns
Y*
nRDATA Active Time Low
nWDATA Write Data Width Low
40
.5
*X specifies one MCLK period and Y specifies one WCLK period.
MCLK = 16x Data Rate (at 500 Kbp/s MCLK = 8 MHz)
WCLK = 2x Data Rate (at 500 Kbp/s WCLK = 1 MHz)
FIGURE 3 - DISK DRIVE TIMING
SMSC DS – USB97CFDC2-01
Page 18
Rev. 02-27-07
DATASHEET
SMSC [ SMSC CORPORATION ]
