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LPC47M10X_07 参数 Datasheet PDF下载

LPC47M10X_07图片预览
型号: LPC47M10X_07
PDF下载: 下载PDF文件 查看货源
内容描述: 100引脚增强型超级I / O控制器, LPC接口为消费类应用 [100 Pin Enhanced Super I/O Controller with LPC Interface for Consumer Applications]
分类和应用: 控制器PC
文件页数/大小: 188 页 / 1031 K
品牌: SMSC [ SMSC CORPORATION ]
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SER_IRQ Cycle Control  
There are two modes of operation for the SER_IRQ Start Frame.  
1) Quiet (Active) Mode: Any device may initiate a Start Frame by driving the SER_IRQ low for one clock, while the  
SER_IRQ is Idle. After driving low for one clock the SER_IRQ must immediately be tri-stated without at any time  
driving high. A Start Frame may not be initiated while the SER_IRQ is Active. The SER_IRQ is Idle between Stop  
and Start Frames. The SER_IRQ is Active between Start and Stop Frames. This mode of operation allows the  
SER_IRQ to be Idle when there are no IRQ/Data transitions which should be most of the time.  
Once a Start Frame has been initiated the Host Controller will take over driving the SER_IRQ low in the next clock  
and will continue driving the SER_IRQ low for a programmable period of three to seven clocks. This makes a total  
low pulse width of four to eight clocks. Finally, the Host Controller will drive the SER_IRQ back high for one clock,  
then tri-state.  
Any SER_IRQ Device (i.e., The LPC47M10x) which detects any transition on an IRQ/Data line for which it is  
responsible must initiate a Start Frame in order to update the Host Controller unless the SER_IRQ is already in an  
SER_IRQ Cycle and the IRQ/Data transition can be delivered in that SER_IRQ Cycle.  
2) Continuous (Idle) Mode: Only the Host controller can initiate a Start Frame to update IRQ/Data line information.  
All other SER_IRQ agents become passive and may not initiate a Start Frame. SER_IRQ will be driven low for four to  
eight clocks by Host Controller. This mode has two functions. It can be used to stop or idle the SER_IRQ or the Host  
Controller can operate SER_IRQ in a continuous mode by initiating a Start Frame at the end of every Stop Frame.  
An SER_IRQ mode transition can only occur during the Stop Frame. Upon reset, SER_IRQ bus is defaulted to  
Continuous mode, therefore only the Host controller can initiate the first Start Frame. Slaves must  
continuously sample the Stop Frames pulse width to determine the next SER_IRQ Cycle’s mode.  
SER_IRQ Data Frame  
Once a Start Frame has been initiated, the LPC47M10x will watch for the rising edge of the Start Pulse and start  
counting IRQ/Data Frames from there. Each IRQ/Data Frame is three clocks: Sample phase, Recovery phase, and  
Turn-around phase. During the Sample phase the LPC47M10x must drive the SER_IRQ low, if and only if, its last  
detected IRQ/Data value was low. If its detected IRQ/Data value is high, SER_IRQ must be left tri-stated. During the  
Recovery phase the LPC47M10x must drive the SER_IRQ high, if and only if, it had driven the SER_IRQ low during  
the previous Sample Phase. During the Turn-around Phase the LPC47M10x must tri-state the SER_IRQ. The  
LPC47M10x will drive the SER_IRQ line low at the appropriate sample point if its associated IRQ/Data line is low,  
regardless of which device initiated the Start Frame.  
The Sample Phase for each IRQ/Data follows the low to high transition of the Start Frame pulse by a number of  
clocks equal to the IRQ/Data Frame times three, minus one. (e.g. The IRQ5 Sample clock is the sixth IRQ/Data  
Frame, (6 x 3) - 1 = 17th clock after the rising edge of the Start Pulse).  
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