the power consumption by the part. The part will revert back to its low power mode when the access has been
completed.
Pin Behavior
The LPC47M10x is specifically designed for systems in which power conservation is a primary concern. This makes the
behavior of the pins during powerdown very important.
The pins of the LPC47M10x can be divided into two major categories: system interface and floppy disk drive interface.
The floppy disk drive pins are disabled so that no power will be drawn through the part as a result of any voltage applied
to the pin within the part's power supply range. Most of the system interface pins are left active to monitor system
accesses that may wake up the part.
Table 48 - PC/AT and PS/2 Available Registers
AVAILABLE REGISTERS
BASE + ADDRESS
PC-AT
PS/2 (MODEL 30)
ACCESS PERMITTED
Access to these registers DOES NOT wake up the part
00H
01H
02H
03H
04H
06H
07H
07H
----
----
DOR (1)
---
DSR (1)
---
DIR
SRA
SRB
DOR (1)
---
DSR (1)
---
R
R
R/W
---
W
---
R
W
DIR
CCR
CCR
Access to these registers wakes up the part
04H
05H
MSR
Data
MSR
Data
R
R/W
Note 1: Writing to the DOR or DSR does not wake up the part, however, writing any of the motor enable bits or doing a
software reset (via DOR or DSR reset bits) will wake up the part.
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