Note 5: Min ITRI with VCC = 0 and CIR ‘off’ is 250 μA.
CAPACITANCE TA = 25°C; fc = 1MHz; VCC = 3.3V ±10%
LIMITS
PARAMETER
Clock Input Capacitance
Input Capacitance
SYMBOL
CIN
CIN
COUT
MIN
TYP
MAX
20
10
UNIT
pF
pF
TEST CONDITION
All pins except pin
under test tied to
AC ground
Output Capacitance
20
pF
TIMING DIAGRAMS
For the Timing Diagrams shown, the following capacitive loads are used on outputs.
CAPACITANCE
NAME
SER_IRQ
nLAD[3:0]
nLDRQ
nDIR
nSTEP
nDS0-1
nWDATA
PD[0:7]
nSTROBE
nALF
TOTAL (pF)
50
50
50
240
240
240
240
240
240
240
240
50
nSLCTIN
J1X-Y
J2X-Y
50
KDAT
KCLK
MDAT
MCLK
MIDI_Tx
FANx
240
240
240
240
50
50
LEDx
50
TXD1
50
TXD2
50
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