t 1
t 2
V c c
t 3
A ll H o s t
A c c e s s e s
FIGURE 8 - POWER-UP TIMING
NAME
DESCRIPTION
Vcc Slew from 2.7V to 0V
MIN
300
100
125
TYP
MAX
UNITS
μs
t1
t2
t3
Vcc Slew from 0V to 2.7V
μs
All Host Accesses After Powerup (Note 1)
500
μs
Note 1: Internal write-protection period after Vcc passes 2.7 volts on power-up
t1
t2
t2
CLOCKI
FIGURE 9A - INPUT CLOCK TIMING
NAME
DESCRIPTION
Clock Cycle Time for 14.318MHz
Clock High Time/Low Time for 14.318MHz
Clock Cycle Time for 32kHz
Clock High Time/Low Time for 32kHz
Clock Rise Time/Fall Time (not shown)
MIN
TYP
69.84
35
31.25
16.53
MAX
UNITS
ns
ns
μs
μs
t1
t2
t1
t2
20
5
ns
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