REGISTER B (BH)
MSB
LSB
b0
b7
b6
PIE
b5
b4
b3
b2
b1
SET
AIE
UIE
RES
DM2
24/12
DSE
"0". The AIE bit is not affected by any internal
functions.
SET
When the SET bit is a "0", the update functions
normally by advancing the counts once per
second. When the SET bit is a "1", an update
cycle in progress is aborted and the program
may initialize the time and calendar bytes
without an update occurring in the middle of
initialization. SET is a read/write bit which is not
modified by RESET_DRV or any internal
functions.
UIE
The update-ended interrupt enable bit is a
read/write bit which enables the update-end flag
(UF) bit in Register C to assert IRQB. The
RESET_DRV port or the SET bit going high
clears the UIE bit.
RES
PIE
Reserved - read as “0”.
The periodic interrupt enable bit is a read/write
bit which allows the periodic-interrupt flag (PF)
bit in Register C to cause the IRQB port to be
driven low. The program writes a "1" to the PIE
bit in order to receive periodic interrupts at the
rate specified by the RS3-RS0 bits in Register
A. A zero in PIE blocks IRQB from being
initiated by a periodic interrupt, but the periodic
flag (PF) is still set at the periodic rate. PIE is
not modified by any internal function, but is
cleared to "0" by a RESET_DRV.
DM
The data mode bit indicates whether time and
calendar updates are to use binary or BCD
formats. The DM bit is written by the processor
program and may be read by the program, but
is not modified by any internal functions or by
RESET_DRV.
data, while a "0" in DM specifies BCD data.
A
"1" in DM signifies binary
24/12
The 24/12 control bit establishes the format of
the hours byte as either the 24 hour mode if set
to a "1", or the 12 hour mode if cleared to a "0".
This is a read/write bit which is not affected by
RESET_DRV or any internal function.
AIE
The alarm interrupt enable bit is a read/write bit,
which when set to a "1" permits the alarm flag
(AF) bit in Register C to assert IRQB. An alarm
interrupt occurs for each second that the three
time
bytes equal the three alarm bytes
DSE
(including a "don't care" alarm code of binary
11XXXXXX). When the AIE bit is a "0", the AF
bit does not initiate an IRQB signal. The
The daylight savings enable bit is read only and
is always set to a "0" to indicate that the daylight
savings time option is not available.
RESET_DRV
port
clears
AIE
to
154
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