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FDC37B78X_07 参数 Datasheet PDF下载

FDC37B78X_07图片预览
型号: FDC37B78X_07
PDF下载: 下载PDF文件 查看货源
内容描述: 超级I / O控制器,支持ACPI ,实时时钟和消费性红外端口 [Super I/O Controller with ACPI Support, Real Time Clock and Consumer IR]
分类和应用: 控制器时钟
文件页数/大小: 249 页 / 865 K
品牌: SMSC [ SMSC CORPORATION ]
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and the Status register, Input Data register, and  
Output Data register. TABLE 57 shows how the  
interface decodes the control signals. In addition  
to the above signals, the host interface includes  
keyboard and mouse IRQs.  
KEYBOARD ISA INTERFACE  
The FDC37B78x ISA interface is functionally  
compatible with the 8042-style host interface. It  
consists of the D0-7 data bus; the nIOR, nIOW  
TABLE 57 - ISA I/O ADDRESS MAP  
ISA ADDRESS  
nIOW  
nIOR  
BLOCK  
KDATA  
KDATA  
KDCTL  
KDCTL  
FUNCTION (NOTE 1)  
Keyboard Data Write (C/D=0)  
Keyboard Data Read  
Keyboard Command Write (C/D=1)  
Keyboard Status Read  
0x60  
0
1
0
1
1
0
1
0
0x64  
Note 1:These registers consist of three separate 8 bit registers. Status, Data/Command Write and Data  
Read.  
Keyboard Data Write  
Keyboard Command Write  
This is an 8 bit write only register. When written,  
the C/D status bit of the status register is cleared  
to zero and the IBF bit is set.  
This is an 8 bit write only register. When written,  
the C/D status bit of the status register is set to  
one and the IBF bit is set.  
Keyboard Data Read  
Keyboard Status Read  
This is an 8 bit read only register. If enabled by  
"ENABLE FLAGS", when read, the KIRQ output is  
cleared and the OBF flag in the status register is  
This is an 8 bit read only register. Refer to the  
description of the Status Register for more  
information.  
cleared.  
If not enabled, the KIRQ and/or  
AUXOBF1 must be cleared in software.  
CPU-to-Host Communication  
The FDC37B78x CPU can write to the Output  
Data register via register DBB. A write to this  
register automatically sets Bit 0 (OBF) in the  
Status register. See Table 58.  
Table 58 - Host Interface Flags  
FLAG  
8042 INSTRUCTION  
OUT DBB  
Set OBF, and, if enabled, the KIRQ output signal goes high  
130  
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