SMI/PME/SCI Logic
The logic for the SMI, PME and SCI signals is shown in the figures that follow.
PME_EN
Registers
PME_STS
Registers
PME_STS1 Register
PME_EN1 Register
RI2
From
SMI/PME
Device
Interrupt
Block
EN_RI2
EN_RI1
RI1
KBD
MOUSE
RING
EN_KBD
MUX
nPME
nPME
pin
EN_MOUSE
EN_RING
0 0
0 1
1 0
nSCI
IRQ9
DEV_INT
EN_DEVINT
PME_STS
PME_EN
Bit[6]
Bits[6:5]
of IRQ
PME_STS2 Register
Bit[5]
PME_EN2 Register
Mux Control
Register
GP10
GP11
EN_GP10
EN_GP11
EN_GP12
EN_GP13
EN_GP14
EN_GP15
EN_GP16
EN_GP17
GP12
GP13
GP14
GP15
GP16
GP17
nSCI
on IRQx
pin
GPE_STS
Register
GPE_EN
Register
SCI_STS1
GPE_STS.0
nSCI
on Serial
IRQx
SCI_EN1
GPE_EN.0
PM1_BLK
SCI_EN
Bit[2] of IRQ Mux
Control Register
PWRBTN_STS
PWRBTN_EN
nPowerOn
Key to Symbols
WAK_STS
Enable bit
Sticky Status bit: Cleared by software
writing a ‘1’ to its bit location
WAK_CTRL
FIGURE 7 - PME/SCI LOGIC
156
SMSC [ SMSC CORPORATION ]
