欢迎访问ic37.com |
会员登录 免费注册
发布采购

EMC6D102-CK 参数 Datasheet PDF下载

EMC6D102-CK图片预览
型号: EMC6D102-CK
PDF下载: 下载PDF文件 查看货源
内容描述: 风扇控制装置与硬件监控和声学降噪功能 [Fan control Device with Hardware Monitoring and Acoustic Noise Reduction Features]
分类和应用: 运动控制电子器件风扇信号电路装置光电二极管电动机控制监控
文件页数/大小: 86 页 / 1523 K
品牌: SMSC [ SMSC CORPORATION ]
 浏览型号EMC6D102-CK的Datasheet PDF文件第48页浏览型号EMC6D102-CK的Datasheet PDF文件第49页浏览型号EMC6D102-CK的Datasheet PDF文件第50页浏览型号EMC6D102-CK的Datasheet PDF文件第51页浏览型号EMC6D102-CK的Datasheet PDF文件第53页浏览型号EMC6D102-CK的Datasheet PDF文件第54页浏览型号EMC6D102-CK的Datasheet PDF文件第55页浏览型号EMC6D102-CK的Datasheet PDF文件第56页  
Fan Control Device with Hardware Monitoring and Acoustic Noise Reduction Features  
Datasheet  
The PWM duty cycle is represented as follows:  
Table 7.4 PWM Duty vs Register Reading  
CURRENT DUTY  
VALUE (DECIMAL)  
VALUE (HEX)  
0%  
0
00h  
25%  
50%  
64  
40h  
80h  
FFh  
128  
255  
100%  
During spin-up, the PWM duty cycle is reported as 0%.  
Notes:  
The PWMx Current Duty Cycle always reflects the current duty cycle on the associated PWM pin.  
The PWMx Current Duty Cycle register is implemented as two separate registers: a read-only and  
a write-only. When a value is written to this register in manual mode there will be a delay before  
the programmed value can be read back by software. The hardware updates the read-only PWMx  
Current Duty Cycle register on the beginning of a PWM cycle. If Ramp Rate Control is disabled,  
the delay to read back the programmed value will be from 0 seconds to 1/(PWM frequency)  
seconds. Typically, the delay will be 1/(2*PWM frequency) seconds.  
7.2.7  
Register 3Eh: Company ID  
Register  
Address  
Read/  
Write  
Bit 7  
Bit 0  
Default  
Value  
Register Name  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
(MSb)  
(LSb)  
3Eh  
R
Company ID  
7
6
5
4
3
2
1
0
5Ch  
The Company ID register contains the company identification number. This number is a method for  
uniquely identifying the part manufacturer.  
This register is read only – a write to this register has no effect.  
7.2.8  
Register 3Fh: Version / Stepping  
Register  
Address  
Read/  
Write  
Bit 7  
Bit 0  
Default  
Value  
Register Name  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
(MSb)  
(LSb)  
3Fh  
R
Version / Stepping  
VER3  
VER  
2
VER  
1
VER  
0
STP  
3
STP  
2
STP  
1
STP0  
65h  
The four least significant bits of the Version / Stepping register [3:0] contain the current stepping of the  
EMC6D102 silicon. The four most significant bits [7:4] reflect the version number.  
The register is used by application software to identify which device has been implemented in the given  
system. Based on this information, software can determine which registers to read from and write to.  
Further, application software may use the current stepping to implement work-arounds for bugs found  
in a specific silicon stepping. This register is read only – a write to this register has no effect.  
Revision 0.4 (04-05-05)  
SMSC EMC6D102  
DATA5S2HEET