Fan Control Device with High Frequency PWM and Temperature Monitors
Datasheet
8.2.26
Registers 85h-88h: A/D Converter LSbs Registers
Table 8.51 Registers 85h-88h: A/D Converter LSbs Registers
Register
Address
Read/
Write
Register
Name
Bit 7
(MSb)
Bit 0
(LSb)
Default
Value
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
85h
86h
88h
R
R
R
A/D Converter LSbs Reg 1
A/D Converter LSbs Reg 2
A/D Converter LSbs Reg 4
RD2.3
RES
RD2.2
RES
RD2.1
RES
RD2.0
RES
RD1.3
AM.3
RD1.2
AM.2
RD1.1
AM.1
RD1.0
AM.0
N/A
N/A
N/A
VCC.3
VCC.2
VCC.1
VCC.0
VCP.3
VCP.2
VCP.1
VCP.0
There is a 10-bit Analog to Digital Converter (ADC) located in the hardware monitoring block that
converts the measured voltages into 10-bit reading values. Depending on the averaging scheme
enabled, the hardware monitor may take multiple readings and average them to create the values
stored in the reading registers (i.e., 16x averaging, 32x averaging, etc.) The 8 MSb’s of the reading
values are placed in the Reading Registers. When the upper 8-bits located in the reading registers
are read the 4 LSb’s are latched into their respective bits in the A/D Converter LSbs Register. This
give 12-bits of resolution with a minimum value of 1/16th per unit measured. (i.e., Temperature Range:
-127.9375 ºC < Temp < 127.9375 ºC and Voltage Range: 0 < Voltage < 256.9375) . See the DC
Characteristics for the accuracy of the reading values.
The eight most significant bits of the 12-bit averaged readings are stored in Reading registers and
compared with Limit registers. The Interrupt Status Register bits are asserted if the corresponding
measured value(s) on the inputs violate their programmed limits.
8.2.27
Registers 90h-93h: TachX Option Registers
Register
Address
Read/
Write
Bit 7
(MSb)
Bit 0
(LSb)
Default
Value
Register Name
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
90h
91h
92h
93h
R/W
R/W
R/W
R/W
Tach1 Option
Tach2 Option
Tach3 Option
Tach4 Option
RESERVED
RESERVED
RESERVED
RESERVED
3EDG
3EDG
3EDG
3EDG
MODE
MODE
MODE
MODE
EDG1
EDG1
EDG1
EDG1
EDG0
EDG0
EDG0
EDG0
SLOW
SLOW
SLOW
SLOW
04h
04h
04h
04h
These registers become read only when the Lock bit is set. Any further attempts to write to these
registers shall have no effect.
Revision 0.2 (06-14-06)
SMSC EMC2300
DATA7S2HEET
SMSC [ SMSC CORPORATION ]
