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EMC2300-AZC 参数 Datasheet PDF下载

EMC2300-AZC图片预览
型号: EMC2300-AZC
PDF下载: 下载PDF文件 查看货源
内容描述: 风扇控制装置高频PWM和温度监视器 [Fan Control Device with High Frequency PWM and Temperature Monitors]
分类和应用: 风扇装置监视器光电二极管
文件页数/大小: 81 页 / 1625 K
品牌: SMSC [ SMSC CORPORATION ]
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Fan Control Device with High Frequency PWM and Temperature Monitors  
Datasheet  
Table 8.45 Interrupt Enable 2 Register Bits  
BIT  
NAME  
R/W DEFAULT  
DESCRIPTION  
0
TACH  
R
R
R
R
R
0
1
1
1
1
Group TACH INT# enable- When set enables out-of-limit TACH  
measurements assert the INT# pin.  
1
2
3
4
TACH1  
TACH2  
TACH3  
TACH4  
When set, enables the TACH1 tachometer to update status registers and  
generate interrupts.  
When set, enables the TACH2 tachometer to update status registers and  
generate interrupts.  
When set, enables the TACH3 tachometer to update status registers and  
generate interrupts.  
When set, enables the TACH4 tachometer to update status registers and  
generate interrupts.  
5
6
7
RES  
RES  
RES  
R/W  
R/W  
R/W  
0
0
0
Reserved  
Reserved  
Reserved  
8.2.24  
Register 81h: TACH_PWM Association Register  
Table 8.46 Register 81h: TACH_PWM Association Register  
Register  
Address  
Read/  
Write  
Bit 7  
(MSb)  
Bit 0  
(LSb)  
Default  
Value  
Register Name  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
81h  
R/W  
TACH_PWM Association  
T4H  
T4L  
T3H  
T3L  
T2H  
T2L  
T1H  
T1L  
A4h  
These registers become read only when the Lock bit is set. Any further attempts to write to these  
registers shall have no effect.  
This register is used to associate a PWM with a tachometer input. This association is used by the fan  
logic to determine when to prevent a bit from being set in the interrupt status registers.  
The fan tachometer will not cause a bit to be set in the interrupt status register:  
g. if the current value in Current PWM Duty registers is 00h or  
h. if the fan is disabled via the Fan Configuration Register.  
Note: A bit will never be set in the interrupt status for a fan if its tachometer minimum is set to FFFFh.  
See bit definition below.  
Table 8.47 TACH_PWM Association Register Bits  
BIT  
NAME  
R/W DEFAULT  
DESCRIPTION  
0
1
2
3
4
5
6
7
T1L  
T1H  
T2L  
T2H  
T3L  
T3H  
T4L  
T4H  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
0
0
1
0
0
1
0
1
Determine which PWM outputs are associated with the TACH1 input. See  
Table 8.48  
Determine which PWM outputs are associated with the TACH2 input. See  
Table 8.48  
Determine which PWM outputs are associated with the TACH3 input. See  
Table 8.48  
Determine which PWM outputs are associated with the TACH4 input. See  
Table 8.48  
Revision 0.2 (06-14-06)  
SMSC EMC2300  
DATA7S0HEET