Fan Control Device with High Frequency PWM and Temperature Monitors
Datasheet
Table 8.48 PWM Assignment Bit Combinations
Bits[1:0], Bits[3:2], Bits[5:4], Bits[7:6]
PWM Associated With Tachx
00
01
10
11
PWM1
PWM2
PWM3
Reserved
Notes:
Any PWM that has no TACH inputs associated with it must be configured to operate in Mode 1.
All TACH inputs must be associated with a PWM output. If the tach is not being driven by the
associated PWM output it should be configured to operate in Mode 1 and the associated TACH
interrupt must be disabled.
8.2.25
Register 82h: Interrupt Enable 3 Register
Table 8.49 Register 82h: Interrupt Enable 3 Register
Register
Address
Read/
Write
Register
Name
Bit 7
(MSb)
Bit 0
(LSb)
Default
Value
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
82h
R/W
Interrupt Enable 3 (Temp)
RES
RES
RES
RES
D2EN
D1EN
AMB
TEMP
0Eh
These registers become read only when the Lock bit is set. Any further attempts to write to these
registers shall have no effect.
This register is used to enable individual thermal error events to set the corresponding status bits in
the interrupt status registers. This register also contains the group thermal enable bit (Bit[0] TEMP),
which is used to enable thermal events to force the interrupt pin (INT#) low if interrupts are enabled
(see Bit[2] INTEN of the Special Function register at offset 7Ch).
See Figure 6.3 Interrupt Control on page 24.
This register contains the following bits:
:
Table 8.50 Interrupt Enable 3 Register Bits
BIT
NAME
R/W DEFAULT
DESCRIPTION
0
TEMP
R/W
R/W
R/W
R/W
0
1
1
1
Group Temperature enable bit - when set, allows Temperature channels
to assert the INT# pin.
1
2
3
AMB
D1EN
D2EN
When set, enables the ambient temperature monitor to update the status
registers and generate interrupts.
When set, enables the Remote Diode 1 temperature monitor to update
the status registers and generate interrupts.
When set, enables the Remote Diode 2 temperature monitor to update
the status registers and generate interrupts.
4
5
6
7
RES
RES
RES
RES
R/W
R/W
R/W
R/W
0
0
0
0
Reserved
Reserved
Reserved
Reserved
SMSC EMC2300
Revision 0.2 (06-14-06)
DATA7S1HEET
SMSC [ SMSC CORPORATION ]
