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EMC2104-BP-TR 参数 Datasheet PDF下载

EMC2104-BP-TR图片预览
型号: EMC2104-BP-TR
PDF下载: 下载PDF文件 查看货源
内容描述: [Switching Controller]
分类和应用: 风扇控制器
文件页数/大小: 101 页 / 1474 K
品牌: SMSC [ SMSC CORPORATION ]
 浏览型号EMC2104-BP-TR的Datasheet PDF文件第54页浏览型号EMC2104-BP-TR的Datasheet PDF文件第55页浏览型号EMC2104-BP-TR的Datasheet PDF文件第56页浏览型号EMC2104-BP-TR的Datasheet PDF文件第57页浏览型号EMC2104-BP-TR的Datasheet PDF文件第59页浏览型号EMC2104-BP-TR的Datasheet PDF文件第60页浏览型号EMC2104-BP-TR的Datasheet PDF文件第61页浏览型号EMC2104-BP-TR的Datasheet PDF文件第62页  
Dual RPM-Based PWM Fan Controller with Hardware Thermal Shutdown  
Datasheet  
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‘1’ - The VIN4 channel data is inverted. The data presented to the reading registers and compared  
against the limits is determined as FFh - the measured input voltage.  
APPLICATION NOTE: If the TRIP_SET / VIN4 pin is configured to be used to set the Critical / Thermal Shutdown  
temperature associated with the External Diode 1 channel, then this bit cannot be set.  
Bit 5 - VIN3_EN - Enables the voltage mode on the External Diode 3 channel.  
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‘0’ (default) - The External Diode 3 channel operates as a diode channel.  
‘1’ - The External Diode 3 channel operates as a voltage input. The DP3 / DN4 / VREF_T3 pin  
acts as a reference output voltage and the DN3 / DP4 /. VIN3 pin acts as a voltage input. This  
overrides the APD bit in the Configuration 1 Register (20h).  
Bit 4 - VIN3_INV - Determines whether the VIN3 channel data is inverted.  
Bit 3 - VIN2_EN - Enables the voltage mode on the External Diode 2 channel.  
Bit 2 - VIN2_INV - Determines whether the VIN2 channel data is inverted.  
Bit 1 - VIN1_EN - Enables the voltage mode on the External Diode 1 channel.  
Bit 0 - VIN1_INV - Determines whether the VIN1 channel data is inverted.  
APPLICATION NOTE: If the TRIP_SET / VIN4 pin is configured to be used to set the Critical / Thermal Shutdown  
temperature associated with the External Diode 1 channel, then neither Bit 1 nor Bit 0 can  
be set.  
6.12  
Interrupt Status Register  
Table 6.17 Interrupt Status Register  
ADDR  
R/W  
REGISTER  
B7  
B6  
B5  
B4  
B3  
B2  
B1  
B0  
DEFAULT  
Interrupt  
Status  
23h  
R-C  
-
TSD  
TCRIT  
GPIO  
FAN  
HIGH  
LOW  
FAULT  
00h  
Register  
The Interrupt Status Register reports the operating condition of the EMC2104. If any of the bits are set  
to a logic ‘1’ (other than TSD and HWS) then the ALERT# pin will be asserted low if the corresponding  
channel is enabled. Reading from the status register clears all status bits if the error conditions is  
removed. If there are no set status bits, then the ALERT# pin will be released.  
The bits that cause the ALERT# pin to be asserted can be masked based on the channel they are  
associated with unless stated otherwise.  
Bit 6 - TSD - This bit is set to ‘1’ if the internal Thermal Shutdown (TSD) circuit trips indicating that the  
die temperature has exceeded its threshold. When this bit is set, it will not cause the ALERT# pin to  
be asserted however will coincide with the SYS_SHDN# pin being asserted. This bit is cleared when  
the register is read and the error condition has been removed.  
Bit 5 - TCRIT - This bit is set to ‘1’ whenever the any bit in the Tcrit Status Register is set. This bit is  
automatically cleared when the Tcrit Status Register is cleared.  
Bit 4 - GPIO - This bit is set to ‘1’ if any of the bits in the GPIO Status Registers are set.  
Bit 3 - FAN - This bit is set to ‘1’ if any bit in the Fan Status Register is set. This bit is automatically  
cleared when the Fan Status Register is read and the bits are cleared.  
Bit 2 - HIGH - This bit is set to ‘1’ if any bit in the High Status Register is set. This bit is automatically  
cleared when the High Status Register is read and the bits are cleared.  
Revision 1.74 (05-08-08)  
SMSC EMC2104  
DATA5S8HEET