Dual RPM-Based PWM Fan Controller with Hardware Thermal Shutdown
Datasheet
‘0’ (default) - The ALERT# pin will be not be asserted for any error condition associated with
Voltage Channel 4 (TRIP_SET / VIN4).
‘1’ - The ALERT# pin will be asserted for an error condition associated with Voltage Channel 4.
Bit 4 - EXT4_INT_EN - Allows the External Diode 4 channel to assert the ALERT# pin.
‘0’ (default) - The ALERT# pin will be not be asserted for any error condition associated with
External Diode 4.
‘1’ - The ALERT# pin will be asserted for an error condition associated with External Diode 4.
Bit 3 - EXT3_INT_EN - Allows the External Diode 3 or VIN3 channel to assert the ALERT# pin.
‘0’ (default) - The ALERT# pin will not be asserted for any error condition associated with External
Diode 3 or VIN3 channels.
‘1’ - The ALERT# pin will be asserted for an error condition associated with External Diode 3 or
VIN3 channels.
Bit 2 - EXT2_INT_EN - Allows the External Diode 2 or VIN2 channel to assert the ALERT# pin.
‘0’ (default) - The ALERT# pin will not be asserted for any error condition associated with External
Diode 2 or VIN2 channels.
‘1’ - The ALERT# pin will be asserted for an error condition associated with External Diode 2 or
VIN2 channels.
Bit 1 - EXT1_INT_EN - Allows the External Diode 1 or VIN1 channel to assert the ALERT# pin.
‘0’ (default) - The ALERT# pin will not be asserted for any error condition associated with External
Diode 1 or VIN1 channels.
‘1’ - The ALERT# pin will be asserted for an error condition associated with External Diode 1 or
VIN1 channels.
Bit 0 - INT_INT_EN - Allows the Internal Diode channel to assert the ALERT# pin.
‘0’ (default) - The ALERT# pin will not be asserted for any error condition associated with the
Internal Diode.
‘1’ - The ALERT# pin will be asserted for an error condition associated with the Internal Diode.
6.16
Fan Interrupt Enable Register
Table 6.21 Fan Interrupt Enable Register
ADDR
R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
Fan
Interrupt
Enable
SPIN_
INT_EN INT_EN
STALL_
SPIN_
INT_EN2 INT_EN2
STALL_
29h
R/W
-
-
-
-
00h
1
1
The Fan Interrupt Enable controls the masking for each Fan channel. When a channel is enabled, it
will cause the ALERT# pin to be asserted when an error condition is detected.
Bit 3 - SPIN_INT_EN2 - Allows the FAN_SPIN 2 bit to assert the ALERT# pin.
‘0’ (default) - the FAN_SPIN 2 bit will not assert the ALERT# pin though will still update the Status
Register normally
‘1’ - the FAN_SPIN2 bit will assert the ALERT# pin.
Bit 2 - STALL_INT_EN2 - Allows the FAN_STALL2 bit or DRIVE_FAIL2 bit to assert the ALERT# pin.
‘0’ (default) - the FAN_STALL2 bit or DRIVE_FAIL2 bit will not assert the ALERT# pin though it will
still update the Status Register normally.
SMSC EMC2104
Revision 1.74 (05-08-08)
DATA6S1HEET
SMSC [ SMSC CORPORATION ]
