Dual RPM-Based PWM Fan Controller with Hardware Thermal Shutdown
Datasheet
Table 6.9 Beta Compensation Look Up Table (continued)
BETAX[3:0]
AUTO
3
2
1
0
MINIMUM BETA
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
1
1
1
1
1
1
1
1
X
1
1
1
0
0
0
0
1
1
1
1
X
0
1
1
0
0
1
1
0
0
1
1
X
1
0
1
0
1
0
1
0
1
0
1
X
0.197
0.260
0.342
0.449
0.591
0.778
1.024
1.348
1.773
2.333
Disabled
Automatically detected
6.7
REC Configuration Register
Table 6.10 REC Configuration Register
ADDR
R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
REC
Configuration
17h
R/W
-
-
-
-
-
REC3
REC2
REC1
07h
The REC Configuration Register determines whether Resistance Error Correction is used for each
external diode channel. The REC Configuration Register is software locked.
Bit 2 - REC3 - Controls the Resistive Error Correction functionality of External Diode 3 and External
Diode 4 (if APD is enabled, see Section 6.9)
‘0’ - the REC functionality for External Diode 3 is disabled
‘1’ (default) - the REC functionality for External Diode 3 is enabled.
Bit 1 - REC2 - Controls the Resistive Error Correction functionality of External Diode 2.
‘0’ - the REC functionality for External Diode 2 is disabled
‘1’ (default) - the REC functionality for External Diode 2 is enabled.
Bit 0 - REC1 - Controls the Resistive Error Correction functionality of External Diode 1. This bit is
locked if the SHDN_SEL pin is not pulled to VDD (see Table 6.1).
‘0’ - the REC functionality for External Diode 1 is disabled
‘1’ (default) - the REC functionality for External Diode 1 is enabled.
Revision 1.74 (05-08-08)
SMSC EMC2104
DATA5S4HEET
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