Legacy-Free Keyboard/Embedded Controller with SPI and LPC Docking Interface
19.6
FAN1 Pulse Counter Preload Register
The FAN1 pulse counter preload register (Table 19.5) stores the preload value used in the computation
of the FAN1 pulse count (see Section 19.2.4, "Fan Pulse Counter Preload"). The fan pulse count is
computed from the equation in Table 19.1. Writing to the FAN1 pulse counter preload register resets
the FAN1 pulse counter. The FAN1 read latch register value may not be valid for up to 2 fan tachometer
input pulses following a write to the FAN1 pulse counter preload register.
Table 19.5 FAN1 Pulse Counter Preload Register
N/A
HOST ADDRESS
8051 ADDRESS
POWER
0x7F9D
VCC1
0x00
DEFAULT
BIT
D7
D6
D5
D4
D3
D2
D1
D0
-
-
-
-
-
-
-
-
HOST TYPE
8051 R/W
BIT NAME
R/W
D7
R/W
D6
R/W
D6
R/W
D6
R/W
D3
R/W
D2
R/W
D1
R/W
D0
19.7
FAN2 Preload Register
The FAN2 pulse counter preload register (Table 19.6) stores the preload value used in the computation
of the FAN2 pulse count (see Section 19.2.4, "Fan Pulse Counter Preload"). The fan pulse count is
computed from the equation in Table 19.1. Writing to the FAN2 pulse counter preload register resets
the FAN2 pulse counter. The FAN2 read latch register value may not be valid for up to 2 fan tachometer
input pulses following a write to the FAN2 pulse counter preload register.
SMSC LPC47N350
215
Revision 1.1 (01-14-03)
DATASHEET
SMSC [ SMSC CORPORATION ]
