Legacy-Free Keyboard/Embedded Controller with SPI and LPC Docking Interface
20.2
8051 Non-SFR GPIOs
The 8051 non-SFR GPIO pins are listed in Table 20.1 Some 8051 non-SFR GPIOs are multiplexed with
alternate functions (see Table 2.4).
All 8051 non-SFR registers are powered by VCC1. The following pins will tri-state to prevent back-
biasing of external circuitry when they are configured as alternate function outputs and PWRGD is
inactive (i.e. VCC2 is 0v): OUT1, OUT7, OUT8, OUT9, GPIO17, GPIO20, GPIO21, and KSO12.
PROGRAMMER’S NOTE: The direction of alternate function pins that are multiplexed with general purpose I/O pins
(i.e., where the GPIO function is the default), is determined by the GPIO direction bit. For
example, if the KSO14 function of GPIO4 is selected, bit 4 in GPIO Direction Register A
must be set to “1”. This rule does not apply to default non-GPIO pin functions that may
have a GPIO as an alternate function.
n R D
G P IO D IR B IT
n W R
A L T F U N C
C o n tro l b it
A L T F U N C O U T P U T
G P IO O U T R E G B IT
1
0
G P IO P IN
G P IO IN R E G B IT
A L T F U N C IN P U T
Figure 20.1 8051 Non-SFR GPIO Block Diagram
SMSC LPC47N350
219
Revision 1.1 (01-14-03)
DATASHEET
SMSC [ SMSC CORPORATION ]
