Legacy-Free Keyboard/Embedded Controller with SPI and LPC Docking Interface
Chapter 20 GPIO Interface
20.1
Overview
The LPC47N350 includes four 8051 SFR-addressable GPIOs, twenty-nine 8051 non-SFR GPIOs, and
eight LPC/8051-addressable GPIOs (Table 20.1).
The 8051 non-SFR GPIOs are described below in Section 20.2.
Sixteen of the twenty-four GPIOs can generate 8051 interrupts and wake events. See Figure 7.4,
Figure 7.5, Figure 7.4, and Table 7.32 in Section 7.9.
Table 20.1 LPC47N350 GPIO Types
REGISTER
CONTROL
GROUP
WAKE
BUFFER
MODES
PIN NAMES
CAPABLE
TYPE
(Note 20.7)
(Note 20.1)
(Note 20.2) (Note 20.3)
1
2
8051 SFR
Group J
SGPIO30
SGPIO31
N
N
N
N
N
N
N
N
N
N
N
N
Y
Y
Y
N
Y
Y
Y
Y
PP
PP
3
SGPIO32
PP
4
SGPIO33
PP
5
8051 SFR
Group D
Group E
OUT0
PP/OD
PP
6
OUT1/nIRQ8
7
OUT7/nSMI
PP
8
8051 (non-SFR)
OUT8/KBRST (Note 20.4)
KSO12/OUT8/KBRST (Note 20.4)
OUT9/PWM2
PP
9
OD
PP
10
11
12
13
14
15
16
17
18
19
20
OUT10/PWM0
PP
OUT11/PWM1
PP
8051 (non-SFR)
Group A
GPIO0 (WK_SE02)
GPIO1 (WK_SE03)
GPIO2 (WK_SE04)
GPIO3 (TRIGGER) (Note 20.5)
GPIO4 (WK_SE07)/KSO14
GPIO5 (WK_SE10)/KSO15
GPIO6 (WK_SE11)
GPIO7 (WK_SE06)/PWM3
PP
PP
PP
PP
PP
PP
PP
PP/OD
SMSC LPC47N350
217
Revision 1.1 (01-14-03)
DATASHEET
SMSC [ SMSC CORPORATION ]
